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One-shadow-mask ultralow-voltage indium-tin-oxide thin-film transistors on paper substrates

Mao Yan-Kai Jiang Jie Zhou Bin Dou Wei

One-shadow-mask ultralow-voltage indium-tin-oxide thin-film transistors on paper substrates

Mao Yan-Kai, Jiang Jie, Zhou Bin, Dou Wei
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  • A new kind of electric-double-layer indium-tin-oxide (ITO) thin-film transistor (TFT) is fabricated on a paper substrate by one-shadow-mask process. The channel layer can be simultaneously self-assembled between ITO source/drain electrodes by only one shadow mask during RF magnetron sputtering deposition at room temperature. Base on this, we choose microporous SiO2 with electric double layer effect as a gate dielectric, and successfully develop the ultralow-voltage oxide TFT on a paper substrate. The TFT exhibits a good performance with an ultralow operation voltage of 1.5 V, a field-effect mobility of 20.1 cm2/Vs , a subthreshold swing of 188mV/decade, and a large on-off ratio of 5× 105. The full-room-temperature oxide TFT on the paper substrate by one-shadow-mask process shows a lot of advantages, such as low operation voltage, simple device process, low cost, etc. Such a TFT is very promising for the application of low-power and portable electronic products in the future.
    • Funds: Project supported by the National Basic Research Program of China (Grant No. 2007CB310500), and the National Natural Science Foundation of China (Grant No. 10874042).
    [1]

    RyuMK, Yang S, Park S, Hwang C S, Jeong J K 2009 Appl. Phys. Lett. 95 072104

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    Xu T N, Wu H Z, Zhang Y Y, Wang X, Zhu X M, Yuan Z J 2010 Acta Phys. Sin. 59 5018(in Chinese) [徐天宁, 吴惠桢, 张莹莹, 王雄, 朱夏明, 原子健 2010 物理学报 59 5018]

    [3]

    Lim W, Douglas E A, Kim S H, Norton D P, Pearton S J, Ren F, Shen H, Chang W H 2008 Appl. Phys. Lett. 93 252103

    [4]

    Jeong J K, Jeong J H, Yang HW, Park J S, Mo Y G, Kim H D 2007 Appl. Phys. Lett. 91 113505

    [5]

    Kim I D, Choi Y W, Tuller H L 2005 Appl. Phys. Lett. 87 043509

    [6]

    Su N C, Wang J S, Chin A 2009 IEEE Electron Device Lett. 30 1317

    [7]

    Kim J B, Fuentes H C, Kippelen B 2008 Appl. Phys. Lett. 93 242111

    [8]

    Bartic C, Jansen H, Campitelli A, Borghs S 2002 Org. Electron. 3 65

    [9]

    Raval H N, Tiwari S P, Navan R R, Mhaisalkar, Rao V R 2009 IEEE Electron Device Lett. 30 484

    [10]

    Liu Y R, Chen W, Liao R 2010 Acta Phys. Sin. 59 8088 (in Chinese) [刘玉荣, 陈伟, 廖荣 2010 物理学报 59 8088]

    [11]

    Kim D H, Cho N G, Kim H G, Kim H S, Hong J M, Kim I D, 2008 Appl. Phys. Lett. 93 032901

    [12]

    Larsson O, Said E, Berggren M, Crispin X 2009 Adv. Funct. Mater. 19 3334

    [13]

    Cho J H, Lee J, He Y, Kim B, Lodge P T, Frisbie C D 2008 Adv. Mater. 20 686

    [14]

    Sun J, Liu H X, Jiang J, Lu A X, Wan Q 2010 J. Mater. Chem. 20 8010

    [15]

    Lu A X, Sun J, Jiang J, Wan Q 2009 Appl. Phys. Lett. 95 222905

  • [1]

    RyuMK, Yang S, Park S, Hwang C S, Jeong J K 2009 Appl. Phys. Lett. 95 072104

    [2]

    Xu T N, Wu H Z, Zhang Y Y, Wang X, Zhu X M, Yuan Z J 2010 Acta Phys. Sin. 59 5018(in Chinese) [徐天宁, 吴惠桢, 张莹莹, 王雄, 朱夏明, 原子健 2010 物理学报 59 5018]

    [3]

    Lim W, Douglas E A, Kim S H, Norton D P, Pearton S J, Ren F, Shen H, Chang W H 2008 Appl. Phys. Lett. 93 252103

    [4]

    Jeong J K, Jeong J H, Yang HW, Park J S, Mo Y G, Kim H D 2007 Appl. Phys. Lett. 91 113505

    [5]

    Kim I D, Choi Y W, Tuller H L 2005 Appl. Phys. Lett. 87 043509

    [6]

    Su N C, Wang J S, Chin A 2009 IEEE Electron Device Lett. 30 1317

    [7]

    Kim J B, Fuentes H C, Kippelen B 2008 Appl. Phys. Lett. 93 242111

    [8]

    Bartic C, Jansen H, Campitelli A, Borghs S 2002 Org. Electron. 3 65

    [9]

    Raval H N, Tiwari S P, Navan R R, Mhaisalkar, Rao V R 2009 IEEE Electron Device Lett. 30 484

    [10]

    Liu Y R, Chen W, Liao R 2010 Acta Phys. Sin. 59 8088 (in Chinese) [刘玉荣, 陈伟, 廖荣 2010 物理学报 59 8088]

    [11]

    Kim D H, Cho N G, Kim H G, Kim H S, Hong J M, Kim I D, 2008 Appl. Phys. Lett. 93 032901

    [12]

    Larsson O, Said E, Berggren M, Crispin X 2009 Adv. Funct. Mater. 19 3334

    [13]

    Cho J H, Lee J, He Y, Kim B, Lodge P T, Frisbie C D 2008 Adv. Mater. 20 686

    [14]

    Sun J, Liu H X, Jiang J, Lu A X, Wan Q 2010 J. Mater. Chem. 20 8010

    [15]

    Lu A X, Sun J, Jiang J, Wan Q 2009 Appl. Phys. Lett. 95 222905

  • [1] . Acta Physica Sinica, 2002, 51(2): 406-409. doi: 10.7498/aps.51.406
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    [6] Zhu De-Ming, Men Chuan-Ling, Cao Min, Wu Guo-Dong. Ultralow-voltage in-plane-gate indium-tin-oxide thin-film transistors made of P-doped SiO2 dielectrics. Acta Physica Sinica, 2013, 62(11): 117305. doi: 10.7498/aps.62.117305
    [7] He H.F;Chen F.Y. FURTHER COMPENSATION FOR LINEARITY OF SWEEP-VOLTAGE GENERATOR OF THE CAPACITY-FEEDBACK INTEGRATOR TYPE . Acta Physica Sinica, 1956, 1653(5): 477-486.
    [8] Wang Wen-Jing, Xu Xu-Rong, Cai Jun. . Acta Physica Sinica, 1995, 44(7): 1164-1171. doi: 10.7498/aps.44.1164
    [9] Gou Jie, He Zhi-Wei, Pan Guo-Hui, Wang Yin-Yue. Density of defect states in low-k porous SiO2:F film researched by SCLC method. Acta Physica Sinica, 2006, 55(6): 2936-2940. doi: 10.7498/aps.55.2936
    [10] Cao Juan, Gao Chen-Yang, Xu Can. Calculation of structure and properties of one-dimensional silica nanomaterials based on first-principle. Acta Physica Sinica, 2006, 55(8): 4221-4225. doi: 10.7498/aps.55.4221
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  • Received Date:  26 May 2011
  • Accepted Date:  04 July 2011
  • Published Online:  15 April 2012

One-shadow-mask ultralow-voltage indium-tin-oxide thin-film transistors on paper substrates

  • 1. Key Laboratory for Micro-Nano Optoelectronic Devices of Ministry of Education, State Key Laboratory of Chemo/Biosensing and Chemometrics, Hunan University, Changsha 410082, China
Fund Project:  Project supported by the National Basic Research Program of China (Grant No. 2007CB310500), and the National Natural Science Foundation of China (Grant No. 10874042).

Abstract: A new kind of electric-double-layer indium-tin-oxide (ITO) thin-film transistor (TFT) is fabricated on a paper substrate by one-shadow-mask process. The channel layer can be simultaneously self-assembled between ITO source/drain electrodes by only one shadow mask during RF magnetron sputtering deposition at room temperature. Base on this, we choose microporous SiO2 with electric double layer effect as a gate dielectric, and successfully develop the ultralow-voltage oxide TFT on a paper substrate. The TFT exhibits a good performance with an ultralow operation voltage of 1.5 V, a field-effect mobility of 20.1 cm2/Vs , a subthreshold swing of 188mV/decade, and a large on-off ratio of 5× 105. The full-room-temperature oxide TFT on the paper substrate by one-shadow-mask process shows a lot of advantages, such as low operation voltage, simple device process, low cost, etc. Such a TFT is very promising for the application of low-power and portable electronic products in the future.

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