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Realization of the discrete chaotic system based on SET-MOS circuits

Feng Chao-Wen Cai Li Kang Qiang Peng Wei-Dong Bai Peng Wang Jia-Fu

Realization of the discrete chaotic system based on SET-MOS circuits

Feng Chao-Wen, Cai Li, Kang Qiang, Peng Wei-Dong, Bai Peng, Wang Jia-Fu
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  • Received Date:  25 January 2011
  • Accepted Date:  03 March 2011
  • Published Online:  15 November 2011

Realization of the discrete chaotic system based on SET-MOS circuits

  • 1. College of Science, Air Force Engineering University, Xi’an 710051, China;
  • 2. Department of Science Research, Air Force Engineering University, Xi’an 710051, China;
  • 3. Research Center of Integrated Electronic Information System, Air Force Engineering University, Xi’an 710051, China

Abstract: A new method of realizing a discrete chaotic system using the hybrid architecture of single-electron transistor (SET) and metal oxide semiconductor (MOS) is proposed in this paper. The transfer characteristic for two parallel SETs with a biased current source is investigated and the corresponding S-shape piecewise linear function model is established. Based on this model a one-dimensional discrete mapping system is first constructed, and the dynamics of the system is then analyzed through one-dimensional mapping process bifurcation diagram and Lyapunov exponents, and the corresponding discrete chaotic system is finally designed through the electronic circuit of SET-MOS hybrid architecture. All these indicate that our approach not only is feasible but also has some advantages such as simple circuit structure and good integration compared with existing methods.

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