搜索

x
中国物理学会期刊

漏致势垒降低效应对短沟道应变硅金属氧化物半导体场效应管阈值电压的影响

CSTR: 32037.14.aps.60.027102

Drain-induced barrier-lowering effects on threshold voltage in short-channel strained Si metal-oxide semiconductor field transistor

CSTR: 32037.14.aps.60.027102
PDF
导出引用
  • 结合应变硅金属氧化物半导体场效应管(MOSFET)结构,通过求解二维泊松方程,得到了应变Si沟道的电势分布,并据此建立了短沟道应变硅NMOSFET的阈值电压模型.依据计算结果,详细分析了弛豫Si1-βGeβ中锗组分β、沟道长度、漏电压、衬底掺杂浓度以及沟道掺杂浓度对阈值电压的影响,从而得到漏致势垒降低效应对小尺寸应变硅器件阈值电压的影响,对应变硅器件以及电路的设计具有重要的参考价值.

     

    Based on strained silicon metal-oxide semiconductor field transistor (MOSFET) structure, the distribution of surface potential is obtained by solving two-dimensional Poisson equation, and the threshold voltage model is built. According to calculation results, the dependence of threshold voltage on germanium content of relaxed Si1-βGeβ, channel length, voltage of drain, doping content of substrate and channel are studied in detail, and the influence of drain-induced barrier-lowering on scaled strained silicon MOSFET is obtained, which can provide important reference for the design of strained silicon MOSFET device and circuit.

     

    目录

    /

    返回文章
    返回