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中国物理学会期刊

超薄高速率单结微晶硅薄膜电池及其叠层电池

CSTR: 32037.14.aps.64.228801

Ultra-thin film microcrystalline silicon with high deposition rate and its application in tandem silicon solar cells

CSTR: 32037.14.aps.64.228801
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  • 采用甚高频等离子体增强化学气相沉积技术, 基于优化表面形貌及光电特性的溅射后腐蚀ZnO:Al衬底, 将通过调控工艺参数获得的器件质量级高速微晶硅(upc-Si:H )材料(沉积速率达10.57 /s)应用到微晶硅单结电池中, 获得了初始效率达7.49%的高速率超薄微晶硅单结太阳电池(本征层厚度为1.1 m). 并提出插入n型微晶硅和p型微晶硅的隧穿复合结, 实现了非晶硅顶电池和微晶硅底电池之间的低损电连接, 由此获得了初始效率高达12.03% (Voc=1.48 eV, Jsc=11.67 mA/cm2, FF=69.59%)的非晶硅/微晶硅超薄双结叠层电池(总厚度为1.48 m), 为实现低成本生产太阳电池奠定了基础.

     

    Reducing production cost to accelerate the industrialization process of thin film solar cells (TFSCs) makes it urgently demanded to elevate the deposition rate and reduce the needed thickness of absorbers in addition to the prerequisite performance improvement. Based on very high frequency plasma enhanced chemical vapor deposition process with a low bombardment energy and large ion flux, ultra-thin, high-deposition-rate, and high-performing hydrogenated microcrystalline silicon (c-Si:H) single- and related hydrogenated amorphous silicon (a-Si:H)/c-Si:H double-junction TFSCs are developed in this study. By tuning various process parameters (silane concentration, power, and pressure), the deposition rates and electrical properties of c-Si:H materials are studied in detail. Device-level c-Si:H intrinsic materials with a deposition rate of 10.57 /s and photosensitivity of 7.54102 can be obtained when depositing with a silane concentration of 9%, a power of 70 W, and a pressure of 2.5 Torr. By further applying device-level high-deposition-rate c-Si:H intrinsic materials in c-Si:H single-junction TFSCs on magnetron-sputtered and wet-etched aluminum-doped zinc oxide (ZnO:Al) substrates with optimized surface morphologies and photoelectrical properties, and by combining advanced device designs, an initial conversion efficiency of 7.49% can be achieved for pin-type ultra-thin and high-deposition-rate c-Si:H single-junction TFSCs (the thickness values of intrinsic layers are 1.1~m). To further improve the conversion efficiency of TFSCs, pin-type a-Si:H/c-Si:H tandem TFSCs are fabricated by using n-a-Si/n-c-Si/n-nc-SiOx:H/p-nc-SiOx:H as the tunnel recombination junctions (TRJs), which, however, have unaddressed issues that the wide band-gap nc-SiOx:H materials with a low conductivity strongly reduce the recombination rate of carriers, thereby resulting in the photo-generated carriers accumulating near the TRJs, weakening the built-in electric field in the top sub-cells and leading to an open circuit voltage (Voc) loss in a-Si:H/c-Si:H tandem TFSCs up to 115~mV far above average values. By simultaneously inserting the p- and n-type narrow-gap c-Si:H materials, which are highly defective and narrower than the band gap of nc-SiOx:H materials, into the TRJs to implement the electrically lossless interconnection between the a-Si:H top and c-Si:H bottom sub-cells, the Voc loss is successfully reduced to 43~mV and an initial efficiency of 12.03% (Voc=1.48~eV, Jsc=11.67~mA/cm2, FF=69.59%) is achieved for ultra-thin pin-type a-Si:H/c-Si:H tandem TFSCs with a total thickness of 1.48~m, thus paving the way for the low-cost production of TFSCs.

     

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