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中国物理学会期刊

结构参数对N极性面GaN/InAlN高电子迁移率晶体管性能的影响

CSTR: 32037.14.aps.68.20191153

Effect of structure parameters on performance of N-polar GaN/InAlN high electron mobility transistor

CSTR: 32037.14.aps.68.20191153
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  • 基于漂移-扩散传输模型、费米狄拉克统计模型以及Shockley-Read-Hall复合模型等, 通过自洽求解薛定谔方程、泊松方程以及载流子连续性方程, 模拟研究了材料结构参数对N极性面GaN/InAlN 高电子迁移率晶体管性能的影响及其物理机制. 结果表明, 增加GaN沟道层的厚度(5—15 nm)与InAlN背势垒层的厚度(10—40 nm), 均使得器件的饱和输出电流增大, 阈值电压发生负向漂移. 器件的跨导峰值随GaN沟道层厚度的增加与InAlN背势垒层厚度的减小而减小. 模拟中, 各种性能参数的变化趋势均随GaN沟道层与InAlN背势垒层厚度的增加而逐渐变缓, 当GaN沟道层厚度超过15 nm、InAlN背势垒层厚度超过40 nm后, 器件的饱和输出电流、阈值电压等参数基本趋于稳定. 材料结构参数对器件性能影响的主要原因可归于器件内部极化效应、能带结构以及沟道中二维电子气的变化.

     

    Based on the drift-diffusion transport model, Fermi-Dirac statistics and Shockley-Read-Hall recombination model, the effect of the structure parameters on the performance of N-polar GaN/InAlN high electron mobility transistor is investigated by self-consistently solving the Schrodinger equation, Poisson equation and carrier continuity equation. The results indicate that the saturation current density of the device increases and the threshold voltage shifts negatively with GaN channel thickness increasing from 5 nm to 15 nm and InAlN back barrier thickness increasing from 10 nm to 40 nm. The maximum transconductance decreases with GaN channel thickness increasing or InAlN back barrier thickness decreasing. The change trends of the various performance parameters become slow gradually with the increase of the thickness of the GaN channel layer and InAlN back barrier layer. When the GaN channel thickness is beyond 15 nm or the InAlN back barrier thickness is more than 40 nm, the saturation current, the threshold voltage and the maximum transconductance tend to be stable. The influence of the structure parameter on the device performance can be mainly attributed to the dependence of the built-in electric field, energy band structure and the two-dimensional electron gas (2DEG) on the thickness of the GaN channel layer and InAlN back barrier layer. The main physical mechanism is explained as follows. As the GaN channel thickness increases from 5 nm to 15 nm, the bending of the energy band in the GaN channel layer is mitigated, which means that the total built-in electric field in this layer decreases. However, the potential energy drop across this GaN channel layer increases, resulting in the fact that the quantum well at the GaN/InAlN interface becomes deeper. So the 2DEG density increases with GaN channel thickness increasing. Furthermore, the saturation current density of the device increases and the threshold voltage shifts negatively. Moreover, due to the larger distance between the gate and the 2DEG channel, the capability of the gate control of the high electron mobility transistor decreases. Similarly, the depth of the GaN/InAlN quantum well increases with InAlN back barrier thickness increasing from 10 nm to 40 nm, which results in the increase of the 2DEG concentration. Meanwhile, the electron confinement in the quantum well is enhanced. Therefore the device saturation current and the maximum transconductance increase with InAlN back barrier thickness increasing.

     

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