This study addresses the critical issue of state divergence in discrete memristors under non-zero mean excitation, a fundamental limitation arising from the unbounded accumulation characteristic of conventional discrete memristor models. To fundamentally overcome this challenge, we propose a finitememory discrete memristor (FM-DM) model incorporating a novel memory modulation mechanism. By embedding a controllable forgetting factor 0 < α < 1 into the state evolution equation, the conventional full accumulation operation is transformed into a leaky integration process. This introduces an intrinsic energy dissipation and dynamic equilibrium mechanism, which mathematically guarantees the bounded convergence of the internal memristor state under arbitrary input signals, including those with persistent DC components. The proposed model retains the essential nonlinear memory features and the frequencydependent pinched hysteresis fingerprint of ideal memristors while fundamentally eliminating the risk of numerical overflow or attractor collapse.
Building upon the FM-DM model, three universal chaotic evolution architectures are systematically constructed: a pure memristive self-feedback map, a parameter-modulated Hénon map, and an additively coupled Hénon map. In each architecture, the memristor’s internal state serves as a dynamical variable that interacts with the host chaotic system. Comprehensive dynamical analyses—including bifurcation diagrams, Lyapunov exponent spectra, phase portraits, and complexity measures (sample entropy and C₀ complexity)—demonstrate that the introduction of the FM-DM module not only suppresses state divergence but also significantly enriches the system’s nonlinear dynamics. The memory modulation mechanism effectively eliminates large periodic windows, enhances topological dimensionality, and induces high-dimensional hyperchaotic behaviors with improved pseudorandomness and complexity over a wide range of system parameters.
To validate the physical realizability and hardware robustness of the proposed model, an analog discrete-time circuit is designed using dual-stage sample-and-hold technology. This circuit architecture precisely emulates the discrete iterative operations in the continuous-time voltage domain. The FM-DM module and the complete chaotic map are implemented using operational amplifiers (AD711), analog multipliers (AD633), and precision sample-and-hold ICs (LF398). PSIM-based circuit simulations faithfully reproduce the numerically predicted phase-space attractors and fractal structures. All state variables remain strictly confined within the linear operating range of the active components, exhibiting no saturation, distortion, or unbounded drift. The output signals feature a broad continuous spectrum and high entropy, confirming the physical effectiveness and stability of the proposed approach.
In conclusion, this work resolves the long-standing divergence bottleneck in discrete memristive chaotic systems by reconstructing the internal memory mechanism rather than imposing external constraints. The FM-DM model provides a robust and physically realizable framework for designing high-dimensional discrete memristive chaotic maps, offering significant potential for applications in chaotic secure communications, pseudorandom number generation, and hardware-accelerated neuromorphic computing. Future work will focus on PCB-level hardware implementation and the integration of FM-DM as a synaptic unit into spiking neural networks and reservoir computing architectures.