-
This paper investigates the dependence of current and voltage characterizations on stress time in deep submicron PMOSFET's before and after negative bias temperature (NBT) stress, we mainly focus on the threshold voltage shift under NBT stress. It is experimentally demonstrated that the electrochemical reactions at the interface between gate oxide and substrate and the diffusion of hydrogen related species in the oxide are the major causes of the NBT in PMOSFET's. PMOSFET degradation caused by NBT depends on the balance of reactionlimited and diffusionlimited mechanisms.
-
Keywords:
- deep submicron PMOSFET's /
- negative bias temperature instability /
- interface states /
- positive fixed oxide charges
Catalog
Metrics
- Abstract views: 6680
- PDF Downloads: 909
- Cited By: 0