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Study on optimal size of repeater insertion with ununiform temperature distribution

Wang Zeng Dong Gang Yang Yin-Tang Li Jian-Wei

Study on optimal size of repeater insertion with ununiform temperature distribution

Wang Zeng, Dong Gang, Yang Yin-Tang, Li Jian-Wei
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  • Based on the influence of nonuniform temperature distribution on interconnect delay, an analytical model to estimate the optimal size of repeaters inserting RC interconnect is presented in this paper. In the proposed analytical model the temperature distribution is taken into account and a temperature correction factor is introduced to modify the repeater size and obtain the optimal interconnect delay. Adopting parameters of 90 nm and 65 nm process technology, the proposed model is compared with the model without considering the temperature distribution. Results show that the new model is more accurate and saves the repeater insertion area with maximum values of 15.6% and 36.7% in 90 nm and 65 nm technology, respectively.
    • Funds: Project supported by the National Natural Science Foundation of, China (Grant No. 60606006), the National Science Found for Distinguished Young Scholars, China (Grant No. 60725415), and Basic Science Research Fund in Xidian University, China.
    [1]

    Morgenshtein A, Friedman E G, Cinosar R, Kolodny A 2010 IEEETrans. on Very Large Scale Integration (VLSI) Systems 18 689

    [2]

    Zeng J K, Chen C P 2010 11th Int. Symposium on ISQED p818

    [3]

    Saini S, Kumar A M, Veeramachaneni S 2010 23rd Int. Conf. onVLSI Design p411

    [4]

    El-Moursy M A, Friedman E G 2007 Integration the VLSI Journal40 461

    [5]

    Wang Z, Dong G, Yang Y T, Li J W 2011 Chin. Sci. Bull. 56617 (in Chinese) [王增, 董刚, 杨银堂, 李建伟 2011科学通报 56 617]

    [6]

    Wang Z, Dong G, Yang Y T, Li J W 2010 Chin. J. Electron. 19 43

    [7]

    Wang Z, Dong G, Yang Y T, Li J W 2010 Acta Phys. Sin. 59 5646(in Chinese) [王增, 董刚, 杨银堂, 李建伟 2010物理学报 59 5646]

    [8]

    Tang M, Mao J F 2008 Int. Conf. on Microwave and MillimeterWave Technology 2 479

    [9]

    Hasani F, Masouni N 2008 3th Int. Conf. on Design and Technologyof Integrated Systems in Nanoscale Era p1

    [10]

    Zhu Z M, Qian L B, Yang Y T 2009 Chin. Phys. B 18 1188

    [11]

    Li X, Wang J M, Tang W Q 2009 Acta Phys. Sin. 58 3603 (inChinese) [李鑫, Wang J M, 唐卫清 2009 物理学报 58 3603]

    [12]

    Zhu Z M, Qian L B, Yang Y T 2009 Acta Phys. Sin. 58 2631 (inChinese) [朱樟明, 钱利波, 杨银堂 2009 物理学报 58 2631]

    [13]

    Wang J P, Hao Y 2009 Acta Phys. Sin. 58 4267 (in Chinese) [王俊平, 郝跃 2009 物理学报 58 4267]

    [14]

    Bakoglu H B 1990 Circuits, Interconnections, and Packaging forVLSI (New Jersey: Addison-Wesley Publishing Company) p127

    [15]

    Alpert C, Devgan A 1997 Proc. of 34th DAC p588

    [16]

    Otten R H J M, Brayton R K 1998 Proc. of 35th DAC p122

    [17]

    Ajami A H, Banerjee K, Pedram M 2001 IEEE/ACM Int. Conf.on CAD p44

    [18]

    Ja C K, Ismail Y 2007 IEEE Trans. on Very Large Scale Integration(VLSI) Systems 15 963

    [19]

    Ajami A H, Banerjee K 2005 IEEE Trans. on Computer-AidedDesign of Integrated Circuits and Systems 24 849

    [20]

    Ajami A H, Banerjee K, Pedram M 2001 Proc. of 38th DAC p567

    [21]

    Zhu Z M, Zhong B, Hao B T, Yang Y T 2009 Acta Phys. Sin. 587124 (in Chinese) [朱樟明, 钟波, 郝报田, 杨银堂 2009 物理学报 58 7124]

  • [1]

    Morgenshtein A, Friedman E G, Cinosar R, Kolodny A 2010 IEEETrans. on Very Large Scale Integration (VLSI) Systems 18 689

    [2]

    Zeng J K, Chen C P 2010 11th Int. Symposium on ISQED p818

    [3]

    Saini S, Kumar A M, Veeramachaneni S 2010 23rd Int. Conf. onVLSI Design p411

    [4]

    El-Moursy M A, Friedman E G 2007 Integration the VLSI Journal40 461

    [5]

    Wang Z, Dong G, Yang Y T, Li J W 2011 Chin. Sci. Bull. 56617 (in Chinese) [王增, 董刚, 杨银堂, 李建伟 2011科学通报 56 617]

    [6]

    Wang Z, Dong G, Yang Y T, Li J W 2010 Chin. J. Electron. 19 43

    [7]

    Wang Z, Dong G, Yang Y T, Li J W 2010 Acta Phys. Sin. 59 5646(in Chinese) [王增, 董刚, 杨银堂, 李建伟 2010物理学报 59 5646]

    [8]

    Tang M, Mao J F 2008 Int. Conf. on Microwave and MillimeterWave Technology 2 479

    [9]

    Hasani F, Masouni N 2008 3th Int. Conf. on Design and Technologyof Integrated Systems in Nanoscale Era p1

    [10]

    Zhu Z M, Qian L B, Yang Y T 2009 Chin. Phys. B 18 1188

    [11]

    Li X, Wang J M, Tang W Q 2009 Acta Phys. Sin. 58 3603 (inChinese) [李鑫, Wang J M, 唐卫清 2009 物理学报 58 3603]

    [12]

    Zhu Z M, Qian L B, Yang Y T 2009 Acta Phys. Sin. 58 2631 (inChinese) [朱樟明, 钱利波, 杨银堂 2009 物理学报 58 2631]

    [13]

    Wang J P, Hao Y 2009 Acta Phys. Sin. 58 4267 (in Chinese) [王俊平, 郝跃 2009 物理学报 58 4267]

    [14]

    Bakoglu H B 1990 Circuits, Interconnections, and Packaging forVLSI (New Jersey: Addison-Wesley Publishing Company) p127

    [15]

    Alpert C, Devgan A 1997 Proc. of 34th DAC p588

    [16]

    Otten R H J M, Brayton R K 1998 Proc. of 35th DAC p122

    [17]

    Ajami A H, Banerjee K, Pedram M 2001 IEEE/ACM Int. Conf.on CAD p44

    [18]

    Ja C K, Ismail Y 2007 IEEE Trans. on Very Large Scale Integration(VLSI) Systems 15 963

    [19]

    Ajami A H, Banerjee K 2005 IEEE Trans. on Computer-AidedDesign of Integrated Circuits and Systems 24 849

    [20]

    Ajami A H, Banerjee K, Pedram M 2001 Proc. of 38th DAC p567

    [21]

    Zhu Z M, Zhong B, Hao B T, Yang Y T 2009 Acta Phys. Sin. 587124 (in Chinese) [朱樟明, 钟波, 郝报田, 杨银堂 2009 物理学报 58 7124]

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Publishing process
  • Received Date:  28 June 2010
  • Accepted Date:  04 July 2011
  • Published Online:  05 March 2012

Study on optimal size of repeater insertion with ununiform temperature distribution

  • 1. College of Pysics Sicence, Qingdao University, Qingdao 266071, China;
  • 2. Microelectronics Institute, Xidian University, Xi'an 710071, China
Fund Project:  Project supported by the National Natural Science Foundation of, China (Grant No. 60606006), the National Science Found for Distinguished Young Scholars, China (Grant No. 60725415), and Basic Science Research Fund in Xidian University, China.

Abstract: Based on the influence of nonuniform temperature distribution on interconnect delay, an analytical model to estimate the optimal size of repeaters inserting RC interconnect is presented in this paper. In the proposed analytical model the temperature distribution is taken into account and a temperature correction factor is introduced to modify the repeater size and obtain the optimal interconnect delay. Adopting parameters of 90 nm and 65 nm process technology, the proposed model is compared with the model without considering the temperature distribution. Results show that the new model is more accurate and saves the repeater insertion area with maximum values of 15.6% and 36.7% in 90 nm and 65 nm technology, respectively.

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