Electrical properties of LaTiO high-k gate dielectric Ge MOS Capacitor and Ti content optimization

Xu Huo-Xi; Xu Jing-Ping

doi:10.7498/aps.65.037301

Abstract

Ti is intentionally added into La2O3 to prepare LaTiO gate dielectric Ge metal-oxide-semiconductor (MOS) capacitor with both high k value and good interface quality. In order to examine the effects of Ti content on the electrical properties of the device, LaTiO films with different Ti/La2O3 ratios (10.6%, 18.4%, 25.7% and 31.5%) are deposited by reactively co-sputtering Ti and La2O3 targets. Capacitance-voltage curves, gate-leakage current properties and high-field stress characteristics of the devices are measured and analyzed. It is found that some electrical properties, such as interface-sate density, gate-leakage current, device reliability and k value, strongly depend on Ti content incorporated into La2O3. Ti incorporation can significantly increase the k value: the higher the Ti content, the larger the k value is. The relevant mechanism lies in the fact that higher Ti content leads to an increase of Ti-based oxide in the LaTi-based oxide, because Ti-based oxide has larger k value than La-based oxide. On the contrary, interface quality, gate-leakage current and device reliability deteriorate as Ti content increases because Ti-induced defects at and near the interface increase with Ti content increasing. Of the Ti/La2O3 ratios in the examined range, the largest Ti/La2O3 ratio is 31.5%, which results in the highest k value of 29.4, the largest gate-leakage current of 9.710-2 Acm-2 at Vg=1 V, the highest interface-sate density of 4.51012 eV-1cm-2 and the worst device reliability, while the La2O3 film without Ti incorporation exhibits the lowest k value of 11.7, the smallest gate-leakage current of 2.510-3 Acm-2 at Vg=1 V, the lowest interface-sate density of 3.31011 eV-1cm-2 and the best device reliability. As far as the trade-off among the electrical properties is concerned, 18.4% is the most suitable Ti/La2O3 ratio, which leads to a higher k value of 22.7, lower interface-sate density of 5.51011 eV-1cm-2, an acceptable gate-leakage current of 7.110-3 Acm-2 at Vg=1 V, and a better device reliability. In view of the fact mentioned above, excellent electrical properties could be obtained by setting Ti content to be an optimal value. Therefore, the optimization of Ti content is critical for LaTi-based oxide Ge MOS device preparation.

Keywords:

Authors and contacts

Xu Huo-Xi¹,
Xu Jing-Ping²

1.
Department of Electronic Information, Huanggang Normal University, Huangzhou 438000, China;
2.
School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, China

Corresponding author: Xu Jing-Ping, 799904108@qq.com

Funds: Project supported by the National Natural Science Foundation of China (Grant No. 61274112), the Natural Science Foundation of Hubei Province, China (Grant No. 2011CDB165), and the Scientific Research Program of Huanggang Normal University, China (Grant No. 2012028803).

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Cited By

[1]	Zhao M, Liu L, Liang R R, Wang J, Xu J 2014 Jpn. J. Appl. Phys. 53 041301
[2]	Oh I K, Kim M K, Lee J S, Lee C W, Lansalot-Matras C, Noh W, Park J, Noori A, Thompson D, Chu S, Maeng W J, Kim H 2013 Appl. Surf. Sci. 287 349
[3]	Fan J B, Liu H X, Fei C X, Ma F, Fan X J, Hao Y 2013 Chin. Phys. B 22 037702
[4]	Bethge O, Henkel C, Abermann S, Pozzovivo G, Stoeger-pollach M, Werner W S M, Smoliner J, Bertagnolli E 2012 Appl. Surf. Sci. 258 3444
[5]	Bom N M, Soares G V, Krug C, Pezzi R P, Baumvol I J R, Radtke C 2012 Appl. Surf. Sci. 258 5707
[6]	Xie Q, Deduytsche D, Schaekers M, Caymax M, Delabie A, Qu X P, Detavernier C 2010 Appl. Phys. Lett. 97 112905
[7]	Liu G Z, Li C, Lu C B, Tang R F, Tang M R, Wu Z, Yang X, Huang W, Lai H K, Chen S Y 2012 Chin. Phys. B 21 117701
[8]	Lin M, An X, Li M, Yun Q X, Li M, Li Z Q, Liu P Q, Zhang X, Huang R 2014 Chin. Phys. B 23 067701
[9]	Li Q L, Xie Q, Jiang Y L, Ru G P, Qu X P, Li B Z, Zhang D W, Deduytsche D, Detavernier C 2011 Semicond. Sci. Tech. 26 125003
[10]	Xue B Q, Wang S K, Han L, Chang H D, Sun B, Zhao W, Liu H G 2013 Chin. Phys. B 22 107302
[11]	Maeng W J, Oh I K, Lee H B R, Kim M K, Lee C W, Lansalot C 2014 Appl. Surf. Sci. 321 214
[12]	Pi T W, Huang M L, Lee W C, Chu L K, Lin T D, Chiang T H, Wang Y C, Wu Y D 2011 Appl. Phys. Lett. 98 062903
[13]	Lamagna L, Wiemer C, Perego M, Volkos S N, Baldovino S, Tsoutsou D, Coulon P E, Fanciulli M 2010 J. Appl. Phys. 108 084108
[14]	Mirovic I Z, Althobaiti M, Weerakkody A D, Dhanak V R, Linhart W M, Veal T D, Sedghi N, Hall S, Chalker P R, Tsoutsou D, Dimoulas A 2014 J. Appl. Phys. 115 114102
[15]	Mavrou G, Galata S, Tsipas P, Sotiropoulos A, Panayiotatos Y A, Dimoulas A, Evangelou E K, Seo J W, Dieker C 2008 J. Appl. Phys. 103 014506
[16]	Cheng C L, Horng J H, Wu Y Z 2012 Dev. Mater. Reliab. 12 399
[17]	He G, Sun Z Q, Liu M, Zhang L D 2010 Appl. Phys. Lett. 97 192902
[18]	Hu A B, Xu Q X 2010 Chin. Phys. B 19 528
[19]	Xu H X, Xu J P, Li C X, Chan C L, Lai P T 2010 Appl. Phys. A 99 903
[20]	Xu H X, Xu J P, Li C X, Liu L, Lai P T, Chan C L 2009 Proceedings of IEEE International Conference on Electron Devices and Solid-State Circuits Xian, China, November 25-27, 2009 p225
[21]	Fu C H, Chang-Liao K S, Liu L J, Li C C, Chen T C, Cheng J W, Lu C C 2014 Electron Dev. 61 2662
[22]	Sun Q Q, Shi Y, Dong L, Liu H, Ding S J, Zhang D W 2008 Appl. Phys. Lett. 92 102908
[23]	Li C X, Zou X, Lai P T, Xu J P, Chen C L 2008 Microelectron. Reliab. 48 526
[24]	Lu N, Bai W, Ramirez A, Mouli C, Ritenour A, Lee M L, Antoniadis D, Kwong D L 2005 Appl. Phys. Lett. 87 051922
[25]	Arimura H, Naitou Y, Kitano N, Oku Y, Yamaguchi N, Kosuda M, Hosoi T, Shimura T, Watanabe H 2008 ECS Trans. 16 121
[26]	Lu N, Li H J, Gardner M, Wickramanayaka S 2005 Electron Dev. Lett. 26 298
[27]	Terman L M 1962 Solid State Electron. 5 285

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Vol. 65, Issue 3 - 2016-02-05

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