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忆阻器、忆容器和忆感器是具有记忆特性的非线性元件, 隶属于记忆元件系统. 目前, 由于现有可购忆阻器芯片尚存在许多不足, 且忆容器和忆感器的硬件实物研究仍处于实验室验证阶段, 因此, 研究者们获取此类记忆元件硬件仍有难度. 为了解决这个问题, 建立有效的记忆元件等效电路模型, 以促进对记忆元件及其系统的特性和应用研究. 本文根据忆阻器、忆容器和忆感器的本构关系, 提出一种新型浮地记忆元件建模方法, 即采用搭建通用模拟器的方式, 在保证电路拓扑结构不变的情况下, 通过改变接入通用模拟器的无源电路元件分别实现浮地忆阻器、忆容器和忆感器模型. 相比于其他能实现3种浮地记忆元件模型的研究, 本文所搭建的记忆元件模型结构简单, 工作频率更高, 易于电路实现. 结合理论分析、PSPICE仿真及硬件电路实验结果的一致性, 验证基于该通用模拟器搭建记忆元件模型的可行性和有效性.Memristors, memcapacitors and meminductors are nonlinear circuit components with memory effects and belong to memory element (mem-element) system. Since there are many shortcomings in the existing available commercial memristor chips, and the physical realizations of memcapacitor and meminductor hardware are still in early stages, it is still difficult for researchers to obtain hardware mem-elements for research. In order to solve this problem, it is still necessary to build effective equivalent models of mem-elements to facilitate the research on their characteristics and applications. In this paper, a novel floating mem-element modeling method is proposed by connecting different passive circuit component to a universal interface while keeping the circuit topology unchanged. Compared with other floating universal mem-element models, the model built in this paper has simple structure, high working frequencies, thus making proposed models easier to implement. The feasibility and effectiveness of the mem-elements models based on the universal interface are successfully verified through theoretical analysis, PSPICE simulation results and hardware experimental results.
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Keywords:
- memory element /
- hardware experiment /
- hysteresis loop /
- floating emulator
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图 1 通用模拟器设计
Fig. 1. Design of a universal emulator for building models of mem-elements.
图 2 忆阻器模型的PSPICE仿真结果 (a) 不同频率激励下的忆阻器
${v_{{\text{AB}}}}\text-{i_{{\text{AB}}}}$ 特性曲线; (b) 不同频率激励下的忆阻器忆导值$W_{\text{m}}$ 与${v_{{\text{AB}}}}$ 的关系图; (c) 在Uo = 1 V, f = 100 kHz下,${v_{{\text{AB}}}}$ ,${i_{{\text{AB}}}}$ ,$ {\phi _{{\text{AB}}}}_{} $ (用$v_{C_1}$ 表示)和$W_{\text{m}}$ 的时域波形图Fig. 2. Measured simulation results of the proposed memristor emulator: (a) Pinched hysteresis loops under different working frequencies; (b) variation curves of the memductance
$W_{\text{m}}$ plotted against the terminal voltage${v_{{\text{AB}}}}$ ; (c) time-domain wave-forms of${v_{{\text{AB}}}}$ ,${i_{{\text{AB}}}}$ ,$ {\phi _{{\text{AB}}}} $ (represented by$v_{C_1}$ ) and the memductance$W_{\text{m}}$ when Uo = 1 V, f = 100 kHz.
图 3 忆容器模型的PSPICE仿真结果 (a) 不同频率激励下的忆容器
${v_{{\text{AB}}}}\text-{q_{{\text{AB}}}}$ (用${v_{{\text{AB}}}} \text- \left( {{{ - }}{v_{C2}}} \right)$ 表示)特性曲线; (b)不同频率激励下的忆容器忆容值$ {C_{\text{m}}} $ 与${v_{{\text{AB}}}}$ 的关系图; (c) 在Uo = 1 V,$ f $ = 80 kHz下,${v_{{\text{AB}}}}$ 和${q_{{\text{AB}}}}$ (用${{ - }}{v_{C2}}$ 表示)、$ {\phi _{{\text{AB}}}} $ (用${v_{C_1}}$ 表示)和$ {C_{\text{m}}} $ 的时域波形图Fig. 3. Measured simulation results of the proposed memcapacitor emulator: (a) Pinched hysteresis loops under different working frequencies; (b) variation curves of the memcapacitance
$ {C_{\text{m}}} $ plotted against the terminal voltage$ {v_{{\text{AB}}}} $ ; (c) time-domain wave-forms of$ {v_{{\text{AB}}}} $ ,$ {q_{{\text{AB}}}} $ (represented by${{ - }}{v_{C_2}}$ ),$ {\phi _{{\text{AB}}}} $ (represented by${v_{C_1}}$ ) and the memcapacitance$ {C_{\text{m}}} $ when Uo = 1 V,$ f $ = 80 kHz.
图 4 忆感器模型的PSPICE仿真结果 (a) 不同频率激励下的忆感器
${\phi _{{\text{AB}}}} \text- {i_{{\text{AB}}}}$ (用${i_1} \text- {i_{{\text{AB}}}}$ 表示)特性曲线; (b)不同频率激励下忆感器的忆感值倒数$ L_{\text{m}}^{ - 1} $ 与$ {\phi _{{\text{AB}}}} $ (用${i_1}$ 表示)的关系图; (c) 当Uo = 1 V,$ f $ = 100 kHz时,${i_{{\text{AB}}}}$ ,${\rho _{{\text{AB}}}}$ (用${v_{C_1}}$ 表示)、$ {\phi _{{\text{AB}}}} $ 和$ L_{\text{m}}^{ - 1} $ 的时域波形图Fig. 4. Measured simulation results of the proposed meminductor emulator: (a) Pinched hysteresis loops under different working frequencies; (b) variation curves of the inverse meminductance
$ L_{\text{m}}^{ - 1} $ plotted against the flux$ {\phi _{{\text{AB}}}} $ (represented by$ i_1 $ ); (c) time-domain wave-forms of$ {i_{{\text{AB}}}} $ ,${\rho _{{\text{AB}}}}$ (represented by${v_{C_1}}$ ),$ {\phi _{{\text{AB}}}} $ and the inverse meminductance$ L_{\text{m}}^{ - 1} $ when Uo = 1 V,$ f $ = 100 kHz.
图 5 通用模拟器硬件实验电路实现
Fig. 5. Implementation of the universal emulator in hardware experiment.
图 6 在通用模拟器的Z1和Z2接入不同的电阻、电容和电感元件组合, 分别实现忆阻器、忆容器和忆感器模型的硬件实验电路 (a) 忆阻器; (b) 忆容器; (c) 忆感器
Fig. 6. The experimental breadboard implementation of (a) memristor, (b) memcapacitor, (c) meminductor models based on the universal emulator by connecting different combinations of resistor, capacitor or inductor to Z1 and Z2.
图 7 忆阻器模型的硬件电路实验结果 (a) 不同频率激励下的忆阻器
${v_{{\text{AB}}}} \text- {i_{{\text{AB}}}}$ (用${v_{{\text{AB}}}} \text- ({{ - }}{v_{R_3}})$ 表示)特性曲线; (b)不同频率激励下的忆阻器忆导值$ {W_{\text{m}}} $ 与${v_{{\text{AB}}}}$ 的关系图; (c)在Uo = 3 V,$ f $ = 100 kHz下,$ {v_{{\text{AB}}}} $ ,$ {i_{{\text{AB}}}} $ (用${{ - }}{v_{R_3}}$ 表示)、$ {\phi _{{\text{AB}}}} $ (用${v_{C_1}}$ 表示)和$ {W_{\text{m}}} $ 的时域波形图Fig. 7. Experimental results of the proposed memristor emulator: (a) Pinched hysteresis loops under different working frequencies; (b) variation curves of the memductance
$ {W_{\text{m}}} $ plotted against the terminal voltage$ {v_{{\text{AB}}}} $ ; (c) time-domain wave-forms of${v_{{\text{AB}}}}$ ,${i_{{\text{AB}}}}$ (represented by${{ - }}{v_{R_3}}$ ),$ {\phi _{{\text{AB}}}} $ (represented by${v_{C_1}}$ ) and the memductance$ {W_{\text{m}}} $ when Uo = 3 V,$ f $ = 100 kHz.
图 8 忆容器模型的硬件实验结果 (a) 不同频率激励下的忆容器
${v_{{\text{AB}}}}\text-{q_{{\text{AB}}}}$ (用${v_{{\text{AB}}}}{{\text-}}\left( { - {v_{C_2}}} \right)$ 表示)特性曲线; (b)不同频率激励下的忆容器忆容值$ {C_{\text{m}}} $ 与${v_{{\text{AB}}}}$ 的关系图; (c) 在Uo = 3 V,$ f $ = 80 kHz下${v_{{\text{AB}}}}$ ,${q_{{\text{AB}}}}$ (用${{ - }}{v_{C_2}}$ 表示)、$ {\phi _{{\text{AB}}}} $ (用${v_{C_1}}$ 表示)和$ {C_{\text{m}}} $ 的时域波形图Fig. 8. Experimental results of the proposed memcapacitor emulator: (a) Pinched hysteresis loops under different working frequencies; (b) variation curves of the memcapacitance
$ {C_{\text{m}}} $ plotted against the terminal voltage${v_{{\text{AB}}}}$ ; (c) time-domain wave-forms of${v_{{\text{AB}}}}$ ,${q_{{\text{AB}}}}$ (represented by${{ - }}{v_{C_2}}$ ),$ {\phi _{{\text{AB}}}} $ (represented by${v_{C_1}}$ ) and the memcapacitance$ {C_{\text{m}}} $ when Uo = 3 V,$ f $ = 80 kHz.
图 9 忆感器模型的硬件实验结果 (a) 不同频率激励下的忆感器
${\phi _{{\text{AB}}}}\text-{i_{{\text{AB}}}}$ (用$( - {v_{R1}}){{\text- (}} - {v_{R2}})$ 表示)特性曲线; (b)不同频率激励下忆感器的忆感值倒数$L_{\text{m}}^{{{ - 1}}}$ 与$ {\phi _{{\text{AB}}}} $ (用$ - {v_{R1}} $ 表示)的关系图; (c) 在Uo = 3 V,$ f $ = 80 kHz下$ {i_{{\text{AB}}}} $ (用$- {v_{R_2}}$ 表示)、$ {\phi _{{\text{AB}}}} $ (用$- {v_{R_1}}$ 表示)、$ {\rho _{{\text{AB}}}} $ (用${v_{C_1}}$ 表示)和$L_{\text{m}}^{ - 1}$ 的时域波形图Fig. 9. Experimental results of the proposed meminductor emulator: (a) Pinched hysteresis loops under different working frequencies; (b) variation curves of the inverse meminductance
$L_{{{\rm{m}}}}^{{{ - 1}}}$ plotted against the flux$ {\phi _{{\text{AB}}}} $ (represented by${{ - }}{v_{R_1}}$ ) ; (c) time-domain wave-forms of${i_{{\text{AB}}}}$ (represented by${{ - }}{v_{R_2}}$ ),${\rho _{{\text{AB}}}}$ (represented by${v_{C_1}}$ ),$ {\phi _{{\text{AB}}}} $ (represented by$- {v_{R_1}}$ ),$ {\rho _{{\text{AB}}}} $ (represented by${v_{C_1}}$ ) and the inverse meminductance$L_{\text{m}}^{{{ - 1}}}$ when Uo = 3 V,$ f $ = 80 kHz.表 1 基于通用模拟器的记忆元件模型对应特征比较
Table 1. Comparison of characteristics of different kinds of mem-element models based on the proposed universal emulator.
记忆元件类型 忆阻器 忆容器 忆感器 电路拓扑结构 通用模拟器 阻抗元件$ {Z_1} $ 电阻$ {R_{\text{2}}} $ 电阻$ {R_{\text{2}}} $ 电感$ {L_{\text{1}}} $ 阻抗元件$ {Z_{\text{2}}} $ 电阻$ {R_{\text{3}}} $ 电容$ {C_{\text{2}}} $ 电阻$ {R_{\text{2}}} $ 内部状态变量 $q {\text{-}} \phi$ $\sigma {\text{-}} \phi$ $q {\text{-}} \rho$ 本构方程 $ W\left( {{\phi _{{\text{AB}}}}} \right) = {\alpha _1}{\phi _{{\text{AB}}}} + {\beta _1} $ $C_{\text{m} }\left( { {\phi _{ {\text{AB} } } }} \right) = {\alpha _2}{\phi _{ {\text{AB} } } } + {\beta _2}$ $L{_ {\text{m} }^{ - 1} }\left( { {\rho _{ {\text{AB} } } }} \right) = {\alpha _3}{\rho _{ {\text{AB} } } } + {\beta _3}$ $ {\alpha _x} $值 ${\alpha _{\text{1} } } = \dfrac{ { {R_{\text{1} } } }}{ {10 R_{\text{2} }^{\text{2} }{R_{\text{3} } }{C_{\text{1} } } }}$ ${\alpha _{\text{2} } } = \dfrac{ { {R_{\text{1} } }{C_{\text{2} } } }}{ {10 R_{\text{2} }^{\text{2} }{C_{\text{1} } } }}$ ${\alpha _{\text{3} } } = \dfrac{ { {R_{\text{1} } } }}{ {10 L_{\text{1} }^{\text{2} }{R_{\text{2} } }{C_{\text{1} } } }}$ $ {\beta _x} $值 $ {\beta _{\text{1} } } = - \dfrac{ { {R_{\text{1} } } } }{ { {\text{10} }{R_{\text{2} } }{R_{\text{3} } } } }V_{\text{s} } $ $ {\beta _{\text{2} } } = - \dfrac{ { {R_{\text{1} } }{C_{\text{2} } } } }{ { {\text{10} }{R_{\text{2} } } } }V_{\text{s} } $ ${\beta _{\text{3} } } = - \dfrac{ { {R_{\text{1} } } }}{ { {\text{10} }{L_{\text{1} } }{R_{\text{2} } } }}{V_{\text{s} } }$ 
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[1] Chua L O 1971 IEEE Trans. Circuit Theory 18 507
Google Scholar
[2] Strukov D B, Snider G S, Stewart D R, Williams R S 2008 Nature 453 80
Google Scholar
[3] Ventra M D, Pershin Y V, Chua L O 2009 Proc. IEEE 97 1371
Google Scholar
[4] Mauro D, Marco M F, Fernando C, Chua L O 2021 IEEE Transactions on Circuits and Systems I: Regular Papers 68 14
Google Scholar
[5] Yuan F, Li Y 2019 Chaos 29 101101
Google Scholar
[6] Barraj I, Bahloul M A, Masmoudi M 2021 AEU-Inter. J. Electron. C. 132 153664
Google Scholar
[7] Wang M, Yu Y, Yang N, Yang C, Ma H 2019 14th IEEE Conference on Industrial Electronics and Applications (ICIEA) Xi'an, China, June 19−21, 2019
[8] Emara A A M, Aboudina M M, Fahmy H A H 2017 Microelectron. J. 64 39
Google Scholar
[9] Dalgaty T, Castellani N, Turck C, Harabi K E, Vianello E 2021 Nat. Electron. 4 151
Google Scholar
[10] Liu Z, Tang J, Gao B, Yao P, Wu H 2020 Nat. Commun. 11 4234
Google Scholar
[11] Corinto F, Marco M, Forti M, Chua L 2019 IEEE T. Cybernetics 50 4758
Google Scholar
[12] Yang Y 2020 Nat. Commun. 11 3399
Google Scholar
[13] Shang D S, Chai Y C, Cao Z X, Lu J, Sun Y 2015 Chin. Phys. B Sin. 24 68402
Google Scholar
[14] 申见昕, 尚大山, 孙阳 2018 物理学报 67 127501
Google Scholar
Shen J X, Shang D S, Sun Y 2018 Acta Phys. Sin. 67 127501
Google Scholar
[15] 任宽, 张珂嘉, 秦溪子, 任焕鑫, 朱守辉, 杨峰, 孙柏, 赵勇, 张勇 2021 物理学报 70 078701
Google Scholar
Ren K, Zhang K J, Qin X Z, Ren H X, Zhu S H, Yang F, Sun B, Zhao Y, Zhang Y 2021 Acta Phys. Sin. 70 078701
Google Scholar
[16] Han J, Song C, Gao S, Wang Y, Chen C, Pan F 2014 ACS Nano 8 10043
Google Scholar
[17] 沈怡然, 李付鹏, 王光义 2020 电子与信息学报 42 844
Google Scholar
Shen Y R, Li F P, Wang G Y 2020 J. Electron. Infor. Technol. 42 844
Google Scholar
[18] Knowm Inc https://knowm.org/downloads/Knowm_Memeistors.pdf [2019-10-6]
[19] Yuan F, Li Y, Wang G, Dou G, Chen G 2019 Entropy 21 188
Google Scholar
[20] Vista J, Ranjan A 2019 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 2020
Google Scholar
[21] Pu Y, Yu B A 2019 IEEE/CAA J. Automat. Sin. 7 237
Google Scholar
[22] Gupta S, Rai S K 2020 Wireless Pers. Commun. 113 773
Google Scholar
[23] Yesil A, Babacan Y 2020 IEEE Transactions on Circuits and Systems II: Express Briefs 68 1443
Google Scholar
[24] Sozen H, Cam U 2020 J. Circuit. Syst. Comput. 29 2050247
Google Scholar
[25] Pershin Y V, Ventra M 2011 Electron. Lett. 47 243
Google Scholar
[26] Yu D S, Liang Y, Iu HHC, Hu Y H 2014 Chin. Phys. B 23 070702
Google Scholar
[27] Fouda M E, Radwan A G 2012 Electron. Lett. 48 1454
Google Scholar
[28] 梁燕, 于东升, 陈昊 2013 物理学报 62 158501
Google Scholar
Liang Y, Yu D S, Chen H 2013 Acta Phys. Sin. 62 158501
Google Scholar
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Google Scholar
Li Z J, Xiang L B, Xiao W R 2017 J. Electron. Infor. Technol. 39 1626
Google Scholar
[30] Zhao Q, Wang C, Zhang X 2019 Chaos 29 013141
Google Scholar
[31] Zheng C Y, Yu D S, Hu HHC, Fernando, T, Sun T T, Eshraghian J K, Guo H D 2019 IEEE T. Circuits I. 66 4793
Google Scholar
[32] Yu D S, Zhao X, Sun T, Iu HHC, Fernando T 2019 IEEE Transactions on Circuits and Systems II: Express Briefs 67 1334
Google Scholar
[33] Sharma P K, Ranjan R K, Khateb F, Kumngern M 2020 IEEE Access 8 171397
Google Scholar
[34] Wang C, Liu X, Hu X 2017 Chaos 27 033114
Google Scholar
[35] Korneev I A, Semenov V V 2017 Chaos: An Interdisciplinary J. Nonlinear Sci. 27 081104
Google Scholar
[36] Lin T, Iu HHC, Wang X, Wang X 2015 Int. J. Numer. Model. El. 28 275
Google Scholar
[37] Wang G, Shi C, Wang X, Yuan F 2017 Math. Probl. Eng. 2017 6504969
Google Scholar
[38] Fouda M E, Radwan A G 2014 Circuits, Syst. Signal Process. 33 1573
Google Scholar
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