Study on avalanche ruggedness of high voltage IGBTs

Yang Wu-Hua; Wang Cai-Lin; Zhang Ru-Liang; Zhang Chao; Su Le

doi:10.7498/aps.72.20222248

Abstract

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1. 引　言
2. 高压FS-IGBT的雪崩击穿特性
2.1 负微分电阻分支的形成机理
2.2 αpnp的影响
2.3 温度的影响
3. 雪崩产生电流丝的性质
3.1 器件仿真结构模型与模拟方法
3.2 控制电流丝强度的物理机制
3.3 驱动电流丝移动的物理机制
4. 结　论

References

Abstract

With the increase of IGBT voltage and current ratings, the avalanche effect has become an important factor limiting the safe operating area (SOA) of the device. The hole injection of the p+n junction on the back of the device when the avalanche effect occurs is the main feature that distinguishes the avalanche effect of the IGBT from other devices. In this paper, the avalanche breakdown characteristics of IGBT and the behavior of avalanche-generated current filaments are studied through theoretical analysis and numerical simulation, and the physical mechanism dominating the behavior of avalanche-generated current filaments is revealed. The results show that the hole injection on the backside of IGBT leads to an additional negative differential resistance branch on the avalanche breakdown curve, and the strength of the negative differential resistance effect depends on the common base current gain of IGBT α_pnp. With the increase of α_pnp, the negative differential resistance effect becomes stronger, the avalanche current at the valley point where the additional negative differential resistance branch transforms into the positive differential resistance branch also becomes higher. And the valley point at the avalanche breakdown curve of IGBT dominates the strength of the avalanche-generated filament. As a result, the strength of avalanche-generated filament depends on the α_pnp. With the lattice temperature increasing, the avalanche breakdown voltage of IGBT increases, leading to the shifting of the avalanche breakdown curve towards a higher voltage. And with the increase of α_pnp, the offset of the avalanche breakdown curves at high and low temperature becomes smaller, which dominates the lateral movement speed of the avalanche-generated filament. With the increase of the α_pnp and the decrease of the offset of avalanche breakdown curves at high and low temperature, the avalanche-generated filament laterally moves more slowly. To sum up, with the increase of the α_pnp of IGBT, the avalanche-generated filament becomes stronger and moves more slowly, which extremely causes the local overheating where the filaments exist and lowers the avalanche robustness of the device. Therefore, the α_pnp of IGBT must be controlled precisely in order to have a good trade-off between the characteristics and the reliability of IGBT.

Keywords:

PACS:

85.30.Mn	(Junction breakdown and tunneling devices (including resonance tunneling devices))
85.30.Pq	(Bipolar transistors)
85.30.Tv	(Field effect devices)

Authors and contacts

Department of Electronic and Engineering, Xi’an University of Technology, Xi’an 710048, China

Corresponding author: Yang Wu-Hua, yangwuhua@xaut.edu.cn

Funds: Project supported by the Scientific Research Program of Shaanxi Provincial Education Department of China (Grant No. 22JK0484), the Teachers' Doctoral Research Funding of Xi’an University of Technology of China (Grant No. 103-451121007), the Natural Science Basic Research Program of Science and Technology Department of Shaanxi Province of China (Grant No. 2023-JC-QN-0764), and the Sub-Project of the Key Research and Development Program of Shaanxi Province of China (Grant No. 2021LLRH-02).

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1. 引　言

功率器件两端施加的电压超过其所能承受的最大阻断电压时, 雪崩倍增效应就会发生, 导致器件雪崩击穿. 通常关注较多的仅仅是器件雪崩击穿电压的大小以及如何提高器件的击穿电压, 然而, 器件雪崩击穿后所呈现出的特性(即器件的后雪崩特性)会影响器件在过电压下的鲁棒性^[1,2]. 大量研究表明, 当器件工作在雪崩击穿曲线的负微分电阻(negative differential resistance, NDR)分支上时, 器件内部会产生由雪崩效应引发的电流局部聚集效应(即电流丝)^[3-5], 而雪崩电流的集中效应也会使本来需要整个芯片承受的雪崩能量向电流丝所在的地方聚集, 大大降低器件的雪崩鲁棒性, 甚至导致器件失效^[6-8]. 当器件发生雪崩击穿后, 由于其产生的功耗巨大, 一般无法直接通过实验进行测试, 所以对雪崩击穿特性的研究大多采用器件仿真和理论分析方法.

1966年, Egawa^[1]首次发现了高压功率二极管雪崩击穿后的负微分电阻效应. Lutz等^[9,10]于2009年和2018年再次对这种物理效应进行了更深入和系统的描述. 二极管在发生雪崩击穿且雪崩电流较大时, 其雪崩击穿曲线会呈现出强烈的NDR分支, 这是由于器件内部形成了类似吊床形的Egawa电场分布^[1]; 当器件工作在NDR分支上时, NDR效应会导致器件内部产生电流聚集效应(即电流丝), 从而使器件极易失效^[1,9,10]. 对于功率MOSFET, 由于其阻断机理与二极管类似, 所以雪崩击穿特性也与二极管类似^[2]. 2014年, Spirito等^[11]对1.2 kV平面栅IGBT雪崩击穿特性进行了研究. IGBT的雪崩击穿曲线呈现两个NDR分支, 其中在较高雪崩电流下的NDR分支形成机理与二极管相似, 即二者都是由Egawa电场分布导致; 在较低电流下的NDR分支是由于其背面空穴注入导致的, 且这个NDR分支是IGBT区别于二极管与功率MOSFET的主要特征.

虽然IGBT雪崩击穿曲线上特有的NDR分支是诱发电流丝的根本原因, 并且NDR分支的形成机理也已被揭示, 但是由于之前的研究并未在NDR效应与电流丝的性质之间建立更清晰的联系, 即未揭示NDR效应对电流丝性质的控制机理, 从而无法获得IGBT雪崩鲁棒性的影响因素. 本文以3.3 kV平面栅场阻止型IGBT(field stop IGBT, FS-IGBT)为研究对象, 通过理论分析与Sentaurus-TCAD数值仿真, 首先通过静态模拟研究IGBT的雪崩击穿特性, 包括其雪崩击穿曲线上负微分电阻分支的形成机理, 以及关键结构参数(α_pnp和温度)对雪崩击穿特性的影响规律; 然后通过动态模拟使器件工作在其雪崩击穿曲线上的NDR分支, 通过对比分析器件在恒温情况与电热耦合情况以及不同结构参数下其内部电流丝的性质, 结合静态模拟的雪崩击穿特性, 清晰揭示了NDR效应对电流丝的控制机理以及对器件鲁棒性的影响. 本工作旨在为IGBT由雪崩诱发的失效分析与器件的抗雪崩设计提供理论参考.

2. 高压FS-IGBT的雪崩击穿特性

2.1 负微分电阻分支的形成机理

图1为3.3 kV平面栅FS-IGBT元胞剖面结构. IGBT的阻断可等效为一个基极开路的pnp晶体管的阻断. 当雪崩击穿发生后, 随着雪崩电流的增大, 其雪崩击穿曲线上首先出现一个NDR分支(NDR1 branch), 如图2所示, 然后出现一个正微分电阻(positive differential resistance, PDR)分支, 最后呈现第二个NDR分支(NDR2 branch).

$图 1 3.3 kV平面栅FS-IGBT的元胞剖面结构\r\nFig. 1. 3.3 kV planar FS-IGBT structure.$

图 1 3.3 kV平面栅FS-IGBT的元胞剖面结构

Fig. 1. 3.3 kV planar FS-IGBT structure.

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$图 2 3.3 kV FS-IGBT的雪崩击穿特性曲线(T = 300 K, NP+ = 2×1017 cm–3, τp0 = 3 μs)\r\nFig. 2. The simulated avalanche breakdown curve of 3.3 kV FS-IGBT(T = 300 K, NP+ = 2×1017 cm–3, τp0 = 3 μs).$

图 2 3.3 kV FS-IGBT的雪崩击穿特性曲线(T = 300 K, N_P+ = 2×10¹⁷ cm^–3, τ_p0 = 3 μs)

Fig. 2. The simulated avalanche breakdown curve of 3.3 kV FS-IGBT(T = 300 K, N_P+ = 2×10¹⁷ cm^–3, τ_p0 = 3 μs).

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为了探究FS-IGBT雪崩击穿曲线上不同微分电阻分支的形成机理, 对各个分支上器件内部的纵向电场分布进行截取, 如图3所示, 由于电场包围的面积即为器件承受的电压.

$图 3 不同雪崩电流密度下器件内部的纵向电场分布(沿元胞中心剖分)\r\nFig. 3. Vertical distributions of electric field along the cell center at different avalanche current(dissected along the cell center).$

图 3 不同雪崩电流密度下器件内部的纵向电场分布(沿元胞中心剖分)

Fig. 3. Vertical distributions of electric field along the cell center at different avalanche current(dissected along the cell center).

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当器件工作在图2中雪崩击穿曲线上的A点时, 其内部电场在N^–漂移区中几乎为线性分布, 因为此时的雪崩电流很小, 空间电荷区中的可动载流子也很少(远远小于器件的本底掺杂浓度), 根据泊松方程, 电场梯度仅由N^–区掺杂浓度N_D决定^[12]:

$\dfrac{{{\text{d}}E}}{{{\text{d}}y}} = \dfrac{q}{{{\varepsilon _{{\text{Si}}}}}} \cdot {N_{\text{D}}}.$

(1)

随着雪崩电流的增大, NDR1 branch出现, 电场包围的面积减小. 如图3中B和B'点的电场所示, 电场包围面积减小的原因是电场的梯度增大, 这是由于J₂结附近雪崩产生的电子会向集电极侧移动, 这相当于给基极开路的pnp晶体管提供了一个基极电流, 从而促使集电区通过正偏的J₁结向N^–漂移区注入空穴, 根据泊松方程, 此时的电场梯度不再由(1)式决定, 而是由下式决定:

$\dfrac{{{\text{d}}E}}{{{\text{d}}y}} = \dfrac{q}{{{\varepsilon _{{\text{Si}}}}}} \cdot \left( {{N_{\text{D}}} + p + {p_{{\text{av}}}} - {n_{{\text{av}}}}} \right),$

(2)

式中, p_av和n_av分别代表空间电荷区中雪崩产生的空穴密度和电子密度, p代表J₁结注入的空穴密度. 而p的大小由此时的α_pnp决定, 如下式所示:

${\alpha _{{\text{pnp}}}} = {\gamma _{\text{p}}} \cdot {\alpha _{{\text{T1}}}} = {\gamma _{\text{p}}} \cdot \dfrac{{\text{1}}}{{\cosh \Bigg(\dfrac{{W_{{\text{FS}}}'}}{{{L_{{\text{p,eff}}}}}}\Bigg)}},$

(3)

式中, γ_p为J₁结的空穴注入效率, $W ' _{\rm FS}$ 为FS层未被耗尽部分的厚度, α_T1为FS层未被耗尽部分的输运系数, L_{p, eff}为空穴在FS层的有效扩散长度. 因为随着J_C的持续增大, 被注入到FS层中的空穴密度增高, 甚至超过FS层的本底掺杂浓度, 因此FS层由小注入向大注入状态过渡, 导致L_{p, eff}在此过程中也会不断增大, 其极限值为FS层中的双极扩散系数L_{a, FS}. 于是, 在此过程中α_pnp也不断增大, 导致V_CE减小. 同时, 根据(3)式, 由于注入到N^–区带正电荷的空穴密度p的大小已足够影响N_D的大小, 导致电场梯度变陡, 其包围面积减小, V_CE减小. 且随着J_C的增大, J₂结处的雪崩效应越来越强烈, 雪崩产生的电子越来越多(pnp晶体管的基极电流越大), 注入到N^–漂移区的空穴也越多, 因此B'点的电场梯度较B点更陡, 导致B'点的V_CE较B点更小, 从而NDR1 branch形成. 由此可见, 这个分支是FS-IGBT后雪崩特性区别于功率二极管的主要特征, 因为二极管的背面并没有P⁺区及空穴的注入.

随着雪崩电流的继续增大, V_CE的减小会到达一个最小值, 如图2中的V点, 然后转而增大, 形成PDR branch. 从图3中C点的电场分布可以看出, 这是由于在集电极侧的电场梯度明显变缓, 即电场在集电极侧向上翘起, 导致电场包围面积增大. 这说明被注入到N^–区的空穴减少, 即此时α_pnp减小. 如(3)式所示, 虽然此时J_C已足够使得FS层处于大注入状态, 即L_{p, eff}已达到极限值L_{a, FS}(这使得α_T1达到最大值), 但是处于大注入状态的FS层中的电子会反扩散进入透明集电区, 导致J₁结的空穴注入效率γ_p大大降低, 从而使得α_pnp急剧减小. α_pnp的减小将导致V_CE的增大, 即PDR branch的形成. 由此可见, FS-IGBT的这个分支与二极管的PDR分支形成机理相似, 都是由于靠近背面高低结处的电场翘起所致.

随着J_C的进一步增大, FS-IGBT又由PDR branch转换为NDR2 branch. 从图3中D点的电场分布可以看出, 这是由于Egawa电场^[1]的出现, 即中间低而两端高的吊床型电场分布, 且由于两端的电场都很高, 形成了相互增强的双侧雪崩效应^[1,13,14]. 这个分支与二极管的NDR分支形成机理相同, 这里将不再赘述.

2.2 α_pnp的影响

由上述分析可知, FS-IGBT雪崩击穿曲线主要特征是NDR1 branch的存在, 此分支形成的根本原因是背面空穴的注入, 而空穴注入的多少受器件α_pnp的控制. 因此, α_pnp是影响FS-IGBT雪崩击穿特性的一个重要因素. 图4所示为模拟的具有不同集电区掺杂浓度N_P+的5种FS-IGBT结构雪崩击穿特性曲线的对比. 图5为通过仿真提取的5种FS-IGBT工作在雪崩击穿模式下时, α_pnp随集电极电流密度J_C的变化关系.

$图 4 3.3 kV FS-IGBT在不同集电极掺杂浓度NP+下的雪崩击穿特性曲线(T = 300 K, τp0 = 3 μs)\r\nFig. 4. The simulated avalanche breakdown curves of 3.3 kV FS-IGBT with different NP+(T = 300 K, τp0 = 3 μs)$

图 4 3.3 kV FS-IGBT在不同集电极掺杂浓度N_P+下的雪崩击穿特性曲线(T = 300 K, τ_p0 = 3 μs)

Fig. 4. The simulated avalanche breakdown curves of 3.3 kV FS-IGBT with different N_P+(T = 300 K, τ_p0 = 3 μs)

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$图 5 3.3 kV FS-IGBT在不同集电极掺杂浓度NP+下, αpnp与雪崩电流密度JC的关系曲线\r\nFig. 5. The αpnp for 3.3 kV FS-IGBT with different NP+ as a function of JC.$

图 5 3.3 kV FS-IGBT在不同集电极掺杂浓度N_P+下, α_pnp与雪崩电流密度J_C的关系曲线

Fig. 5. The α_pnp for 3.3 kV FS-IGBT with different N_P+ as a function of J_C.

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从图5可以看出, 随着J_C从漏电流的水平开始增大, 由于FS层逐渐由小注入向大注入过渡, 造成(3)式中的L_{p, eff}逐渐增大, α_pnp的值也逐渐增大. 当J_C增大到使得FS层中被注入的载流子足够多时, J₁结的空穴注入效率γ_p会明显减小, 从而导致α_pnp的值也急剧减小. 由图4和图5可见, 随着FS-IGBT的N_P+增大, 在同一J_C值下的α_pnp值越大, 从而导致在此J_C值下的V_CE越小; 而且随着N_P+的增大, V_CE的谷值V点对应的J_C值越高, 正如2.1节所分析的, FS-IGBT雪崩击穿曲线由NDR1 branch转换为PDR branch的原因是α_pnp的急剧减小, 从图5可以看到, 随着N_P+的增大, α_pnp发生急剧减小所对应的J_C值增大. 这是因为随着N_P+的增大, 要让γ_p减小, 注入FS层中的空穴密度必须越大, 即J_C越大. 综上所述, FS-IGBT的α_pnp越大, 其负微分电阻(NDR1)效应越强, 且V_CE的谷点V对应的J_C值越高.

2.3 温度的影响

图6为不同N_P+的3.3 kV FS-IGBT在高温与常温下的雪崩击穿特性曲线, 对应的α_pnp与集电极电流密度J_C的关系曲线如图7所示. 由图7可见, 随温度升高, α_pnp增大, 这是由于载流子寿命的增大. 虽然α_pnp的增大会导致雪崩击穿电压的减小, 然而需要指出的是, 温度的升高会使得电子与空穴的碰撞电流率下降^[15], 从而导致雪崩击穿电压增大, 如图6所示. 并且, FS-IGBT的N_P+越大, 即α_pnp越大, 其高、低温雪崩击穿曲线谷点对应V_CE的偏移量ΔV_CE越小, 如图6所示.

$图 6 不同集电极掺杂浓度NP+的3.3 kV FS-IGBT在常温与高温下的雪崩击穿曲线(τp0 = 3 μs)\r\nFig. 6. The avalanche breakdown curves of 3.3 kV FS-IGBT with different NP+ at high and low temperature (τp0 = 3 μs)$

图 6 不同集电极掺杂浓度N_P+的3.3 kV FS-IGBT在常温与高温下的雪崩击穿曲线(τ_p0 = 3 μs)

Fig. 6. The avalanche breakdown curves of 3.3 kV FS-IGBT with different N_P+ at high and low temperature (τ_p0 = 3 μs)

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$图 7 不同集电极掺杂浓度NP+的3.3 kV FS-IGBT在常温与高温下, αpnp与JC的关系曲线\r\nFig. 7. The αpnp for 3.3 kV FS-IGBT with different NP+ as a function of JC at high and low temperature.$

图 7 不同集电极掺杂浓度N_P+的3.3 kV FS-IGBT在常温与高温下, α_pnp与J_C的关系曲线

Fig. 7. The α_pnp for 3.3 kV FS-IGBT with different N_P+ as a function of J_C at high and low temperature.

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3. 雪崩产生电流丝的性质

3.1 器件仿真结构模型与模拟方法

由于在阻断状态下FS-IGBT正面MOS沟道是关闭的, MOS结构不工作, 所以为了提高仿真效率, 从3.3 kV FS-IGBT结构中抽取了背面pnp晶体管结构, 如图8所示, 用于模拟雪崩产生电流丝的结构模型, 器件的总宽度为640 μm(相当于图1中8个元胞的宽度).

$图 8 用于模拟雪崩电流丝的3.3 kV FS-IGBT结构模型(τp0 = 3 μs)\r\nFig. 8. The structure model of 3.3 kV FS-IGBT (τp0 = 3 μs) used to simulate current filament at the static avalanche.$

图 8 用于模拟雪崩电流丝的3.3 kV FS-IGBT结构模型(τ_p0 = 3 μs)

Fig. 8. The structure model of 3.3 kV FS-IGBT (τ_p0 = 3 μs) used to simulate current filament at the static avalanche.

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为了研究器件在雪崩击穿模式下的特性, 上升率为1 μs、幅值为50 A的电流脉冲被直接施加到器件的集-射极, 强迫器件工作在雪崩模式下, 并通过恒温模拟和热电模拟对比分析影响器件在雪崩模式下产生电流丝的性质.

3.2 控制电流丝强度的物理机制

器件雪崩击穿曲线上的NDR分支会促使雪崩产生电流丝增强^[16,17], 这是由于在NDR分支上, 随着雪崩电流的增大, 器件两端的电压减小, 如图2中的NDR分支. 如果器件已经产生了电流丝或者由于器件结构不均匀等因素导致电流向其中某个区域聚集, 且器件此时正好工作在NDR分支上, 那么在此区域中, 由于电流密度升高而电压减小, 即此区域的微分电阻有比其他区域减小的趋势, 这会导致电流将进一步向此区域聚集, 从而形成一个正反馈, 造成电流丝中心的电流密度越来越高; 如果器件工作在PDR分支上, 那么电流向某个区域的聚集, 将导致此区域的微分电阻有比其他区域有增大的趋势, 从而不利于电流向此处的继续聚集. 这就是NDR分支和PDR分支对电流丝强度的影响, 由此可见, 如果NDR分支越强烈, 即器件雪崩击穿曲线上的端电压随电流密度的增大而减小得越快, 器件的负微分电阻效应越强, 会导致电流更快地向电流丝所处的区域聚集, 电流丝的强度越来越大, 直至此区域的工作状态进入PDR分支.

因此, 理论上预估一个器件产生电流丝的最大强度需要判断器件雪崩击穿曲线由NDR分支转换至PDR分支时对应雪崩电流的大小, 即图4中V_CE的谷值点V所对应的电流. V点对应的电流密度越大, 意味着此器件产生电流丝的强度越强. 因此, 当FS-IGBT的α_pnp越大(即集电区掺杂浓度越高, 或者载流子寿命越高)时, 其在雪崩模式下的电流丝强度越强, 从而降低器件的鲁棒性.

3.3 驱动电流丝移动的物理机制

影响器件可靠性的不仅有电流丝的强度, 还有其移动性^[18,19]. 本节将通过恒温模拟和热电模拟的对比, 研究FS-IGBT在雪崩模式下产生电流丝的移动规律.

图9为恒温情况下模拟的N_P+=2×10¹⁷ cm^–3和N_P+=1×10¹⁸ cm^–3两种FS-IGBT工作在雪崩模式下时V_CE随时间变化曲线, I_CE为强迫施加给两个器件相同的电流脉冲. 器件内部的电流密度分布如图10所示. 由于电流脉冲I_CE的幅值为50 A, 所以两种器件工作在图2中雪崩击穿曲线的NDR1 branch上, 这导致图9中的V_CE曲线随I_CE的增大到达峰值后由于NDR效应又快速地下降, 且由于N_P+越大, NDR效应越强, 所以N_P+ = 1 × 10¹⁸ cm^–3时的V_CE曲线比N_P+ = 2×10¹⁷ cm^–3下降幅度更高. 通过观察器件内部的电流密度分布以及雪崩产生的电流丝发现, 电流丝自从产生后一直固定在原来的地方, 并未随时间移动, 图9中的V_CE曲线也稳定不变, 没有发生波动.

$图 9 恒温仿真的NP+ = 2×1017 cm–3和NP+ = 1×1018 cm–3 FS-IGBT工作在静态雪崩模式下时, VCE随时间变化曲线(所施加的电流脉冲幅值为50 A, 上升时间1 μs)\r\nFig. 9. Simulated VCE vs. time curve for FS-IGBTs with different NP+ working in static avalanche mode in isothermal case (the applied current pulse amplitude is 50 A, rise time is 1 μs).$

图 9 恒温仿真的N_P+ = 2×10¹⁷ cm^–3和N_P+ = 1×10¹⁸ cm^–3 FS-IGBT工作在静态雪崩模式下时, V_CE随时间变化曲线(所施加的电流脉冲幅值为50 A, 上升时间1 μs)

Fig. 9. Simulated V_CE vs. time curve for FS-IGBTs with different N_P+ working in static avalanche mode in isothermal case (the applied current pulse amplitude is 50 A, rise time is 1 μs).

下载: 全尺寸图片幻灯片

$图 10 恒温仿真的NP+ = 2×1017 cm–3和NP+ = 1×1018 cm–3 FS-IGBT工作在静态雪崩模式下时, 器件内部的电流密度分布(横向电流密度分布在J2结处被截取得到)\r\nFig. 10. Simulated current density distributions inside the FS-IGBTs with different NP+ working in static avalanche mode in isothermal case (lateral current density distribution is along the J2 junction).$

图 10 恒温仿真的N_P+ = 2×10¹⁷ cm^–3和N_P+ = 1×10¹⁸ cm^–3 FS-IGBT工作在静态雪崩模式下时, 器件内部的电流密度分布(横向电流密度分布在J₂结处被截取得到)

Fig. 10. Simulated current density distributions inside the FS-IGBTs with different N_P+ working in static avalanche mode in isothermal case (lateral current density distribution is along the J₂ junction).

下载: 全尺寸图片幻灯片

上述恒温模拟结果显示, FS-IGBT在雪崩模式下产生的电流丝是静止不动的, 然而恒温模拟并未考虑温升的影响. 因此, 对于N_P+= 1×10¹⁸ cm^–3和N_P+= 2×10¹⁷ cm^–3两种器件, 在相同的电流脉冲条件下再次进行了热电模拟, 仿真的V_CE和器件内部最高温度T_max随时间的变化曲线如图11所示, 器件在雪崩模式下工作时内部的电流密度分布变化如图12(a)和(b)所示.

$图 11 热电仿真的NP+ = 2×1017 cm–3和NP+ = 1×1018 cm–3 FS-IGBT工作在静态雪崩模式下时, VCE和最高晶格温度Tmax随时间变化曲线(所施加的电流脉冲与图9完全相同)\r\nFig. 11. Simulated VCE and maximum lattice temperature Tmax vs. time curves for FS-IGBTs with different NP+ working in static avalanche mode in electrothermal case (applied current pulse is the same as Fig. 9).$

图 11 热电仿真的N_P+ = 2×10¹⁷ cm^–3和N_P+ = 1×10¹⁸ cm^–3 FS-IGBT工作在静态雪崩模式下时, V_CE和最高晶格温度T_max随时间变化曲线(所施加的电流脉冲与图9完全相同)

Fig. 11. Simulated V_CE and maximum lattice temperature T_max vs. time curves for FS-IGBTs with different N_P+ working in static avalanche mode in electrothermal case (applied current pulse is the same as Fig. 9).

下载: 全尺寸图片幻灯片

$图 12 热电仿真的NP+ = 2×1017 cm–3和NP+ = 1×1018 cm–3 FS-IGBT工作在静态雪崩模式下时, 器件内部的电流分布(横向电流密度分布在J2结处被截取得到)\r\nFig. 12. Simulated current density distributions inside the FS-IGBTs with different NP+ working in static avalanche mode in electrothermal case (lateral current density distribution is along the J2 junction).$

图 12 热电仿真的N_P+ = 2×10¹⁷ cm^–3和N_P+ = 1×10¹⁸ cm^–3 FS-IGBT工作在静态雪崩模式下时, 器件内部的电流分布(横向电流密度分布在J₂结处被截取得到)

Fig. 12. Simulated current density distributions inside the FS-IGBTs with different N_P+ working in static avalanche mode in electrothermal case (lateral current density distribution is along the J₂ junction).

下载: 全尺寸图片幻灯片

由图11和图12可见, 器件内部产生了电流丝, 并且电流丝不断移动. 这是由于随着温度升高, FS-IGBT雪崩击穿曲线上NDR1 branch向V_CE更大的方向偏移. 电流丝在某个区域产生, 将会导致此区域的温度升高, 并且高于其他没有电流丝的区域, 于是, 在电流丝所在区域的微分电阻有增大的趋势, 这就造成电流丝向其他温度较低、微分电阻也较低的区域移动.

虽然两种器件中电流丝的强度相差不多, 但是N_P+=1×10¹⁸ cm^–3时电流丝的移动速度明显慢于N_P+=2×10¹⁷ cm^–3时. 这是由于图6中温升导致NDR1 branch的偏移量ΔV_CE不同所致. 偏移量ΔV_CE越大, 电流丝所在处由温升导致的正微分电阻越大, 越容易驱动电流丝向温度较低的地方移动. 电流丝移动地越慢, 意味着其在一个地方停留的时间越长, 导致此处的温升越大, 如图11和图12中的晶格温度变化所示, 这会降低器件的鲁棒性.

需要注意的是, 图11中在温度的同一个跳变周期内N_P+= 1 × 10¹⁸ cm^–3情况下的晶格温度更高, 但由于N_P+= 2 × 10¹⁷ cm^–3时电流丝移动地更快, 当电流丝移动到器件边界后又向相反的方向进行移动, 温度变化的频率更高, 造成在一些时间区间内N_P+= 2 × 10¹⁷ cm^–3的器件最高晶格温度是高于N_P+= 1 × 10¹⁸ cm^–3的(由于N_P+= 1×10¹⁸ cm^–3还处于电流丝移动的前一个周期时, N_P+= 2 × 10¹⁷ cm^–3的电流丝移动已到达下一个周期). 这是器件模拟的局限性造成的^[20,21]. 真实的器件是由成千上万个元胞组成的, 电流丝从器件的一个边界移动到另一个边界需要很长的时间, 并且产生的电流丝可能不仅仅是一条, 因此, 实际器件中N_P+= 1 × 10¹⁸ cm^–3的晶格最高温度整体上应该是高于N_P+= 2 × 10¹⁷ cm^–3的.

4. 结　论

IGBT两端的电压超过其雪崩击穿电压而导致雪崩击穿发生后, J₂结产生的雪崩电子会向集电极侧移动, 促使背面集电区的空穴注入, 使得雪崩击穿曲线上形成一个额外的负微分电阻分支, 这个特有的NDR1分支是IGBT区别于二极管的一个主要特征.

IGBT雪崩击穿曲线由NDR1分支向PDR分支转换时的谷值点对应的雪崩电流和高低温下雪崩击穿曲线的偏移量ΔV_CE分别是控制电流丝强度和移动速度的决定性因素, 并且二者主要由α_pnp大小决定. 当IGBT的α_pnp越大时, NDR1分支呈现的负微分电阻效应越强烈, 且雪崩击穿曲线由NDR1分支向PDR分支转换时的谷值点对应的雪崩电流值越大, 这会导致雪崩产生电流丝的强度越强; 并且, 高低温下雪崩击穿曲线的偏移量ΔV_CE反而越小, 这会导致电流丝的移动速度越慢. 可见, IGBT的雪崩鲁棒性随α_pnp的增大而降低, 因此, 在进行器件设计时, 对于α_pnp的控制要折衷考虑.

References

[1]	Egawa H 1966 IEEE Trans. Electron. Devices 13 754 Google Scholar
[2]	Baburske R, Lutz J, Heinze B 2010 IEEE 2010 IEEE International Reliability Physics Symposium-Garden Grove (Anaheim) CA, USA, May 2–6, 2010 p162
[3]	Hower P L, Reddi V K 2005 IEEE Trans. Electron. Devices 17 320 Google Scholar
[4]	Schulze H J, Niedernostheide F J 2013 IEEE Trans. Electron. Devices 60 551 Google Scholar
[5]	Knipper U, Wachutka G, Pfirsch F, et al. 2008 International Symposium on Power Semiconductor Devices & IC's Orlando, USA, May 18–22, 2008 p307
[6]	Tong X, Liu S, Sun W, et al. 2020 IEEE Trans. Electron. Devices 67 3908 Google Scholar
[7]	Endo K, Nakamae K 2019 IEEE Trans. Device Mater. Reliab. 19 723 Google Scholar
[8]	Bhojani R, Kowalsky J, Lutz J, et al. 2018 International Symposium on Power Semiconductor Devices and IC’s Palmer House Hilton, USA, May 13–17, 2018 p164
[9]	Lutz J, Baburske R, Chen M, et al. 2009 IEEE Trans. Electron. Devices 56 2825 Google Scholar
[10]	Lutz J, Schlangenotto H, et al. 2018 Semiconductor Power Devices: Physics, Characteristic, Reliability (Switzerland: Springer International Publishing)
[11]	Spirito P, Breglio G, Irace A, et al. 2014 IEEE Trans. Electron. Devices 61 1457 Google Scholar
[12]	Baliga B J 2013 IEEE Trans. Electron. Devices 60 535 Google Scholar
[13]	Heinze B, Felsl H P, Mauder A, et al. 2005 International Symposium on Power Semiconductor Devices & IC’s CA, USA, May 13–17, 2005 p159
[14]	Wang C, Zhang L 2017 IEICE Electron. Express 14 1 Google Scholar
[15]	Breglio G, Irace A, Napoli E, et al. 2013 IEEE Trans. Electron. Devices 60 563 Google Scholar
[16]	Knipper U, Pfirsch F, Raker T, et al. 2008 International Conference on Advanced Semiconductor Devices and Microsystems Smolenice, Slovakia, Oct. 12–16, 2008 p159
[17]	Felsl H P, Falck E, Niedernostheide F J, et al. 2006 International Symposium on Power Semiconductor Devices & IC’s Smolenice, Slovakia, June 4–8, 2006 p1
[18]	Tong X, Liu S, Sun W, et al. 2020 Trans. Electron. Devices 67 3908
[19]	Niedernostheide F J, Falck E, Schulze H J, et al. 2006 IEEP. Circ. Dev. Syst. 153 3 Google Scholar
[20]	Shiba Y, Omura I, Tsukuda M 2016 28 th International Symposium on Power Semiconductor Devices & IC’s Prague, Czech Republic, June 12–16, 2016 p339
[21]	Watanabe M, Shigyo N, Hoshii T, et al. 2019 International Symposium on Power Semiconductor Devices and IC’s Shanghai, China, May 19–23, 2019 p311

图 1 3.3 kV平面栅FS-IGBT的元胞剖面结构

Figure 1. 3.3 kV planar FS-IGBT structure.

DownLoad: Full-Size Img PowerPoint

图 2 3.3 kV FS-IGBT的雪崩击穿特性曲线(T = 300 K, N_P+ = 2×10¹⁷ cm^–3, τ_p0 = 3 μs)

Figure 2. The simulated avalanche breakdown curve of 3.3 kV FS-IGBT(T = 300 K, N_P+ = 2×10¹⁷ cm^–3, τ_p0 = 3 μs).

DownLoad: Full-Size Img PowerPoint

图 3 不同雪崩电流密度下器件内部的纵向电场分布(沿元胞中心剖分)

Figure 3. Vertical distributions of electric field along the cell center at different avalanche current(dissected along the cell center).

DownLoad: Full-Size Img PowerPoint

图 4 3.3 kV FS-IGBT在不同集电极掺杂浓度N_P+下的雪崩击穿特性曲线(T = 300 K, τ_p0 = 3 μs)

Figure 4. The simulated avalanche breakdown curves of 3.3 kV FS-IGBT with different N_P+(T = 300 K, τ_p0 = 3 μs)

DownLoad: Full-Size Img PowerPoint

图 5 3.3 kV FS-IGBT在不同集电极掺杂浓度N_P+下, α_pnp与雪崩电流密度J_C的关系曲线

Figure 5. The α_pnp for 3.3 kV FS-IGBT with different N_P+ as a function of J_C.

DownLoad: Full-Size Img PowerPoint

图 6 不同集电极掺杂浓度N_P+的3.3 kV FS-IGBT在常温与高温下的雪崩击穿曲线(τ_p0 = 3 μs)

Figure 6. The avalanche breakdown curves of 3.3 kV FS-IGBT with different N_P+ at high and low temperature (τ_p0 = 3 μs)

DownLoad: Full-Size Img PowerPoint

图 7 不同集电极掺杂浓度N_P+的3.3 kV FS-IGBT在常温与高温下, α_pnp与J_C的关系曲线

Figure 7. The α_pnp for 3.3 kV FS-IGBT with different N_P+ as a function of J_C at high and low temperature.

DownLoad: Full-Size Img PowerPoint

图 8 用于模拟雪崩电流丝的3.3 kV FS-IGBT结构模型(τ_p0 = 3 μs)

Figure 8. The structure model of 3.3 kV FS-IGBT (τ_p0 = 3 μs) used to simulate current filament at the static avalanche.

DownLoad: Full-Size Img PowerPoint

图 9 恒温仿真的N_P+ = 2×10¹⁷ cm^–3和N_P+ = 1×10¹⁸ cm^–3 FS-IGBT工作在静态雪崩模式下时, V_CE随时间变化曲线(所施加的电流脉冲幅值为50 A, 上升时间1 μs)

Figure 9. Simulated V_CE vs. time curve for FS-IGBTs with different N_P+ working in static avalanche mode in isothermal case (the applied current pulse amplitude is 50 A, rise time is 1 μs).

DownLoad: Full-Size Img PowerPoint

图 10 恒温仿真的N_P+ = 2×10¹⁷ cm^–3和N_P+ = 1×10¹⁸ cm^–3 FS-IGBT工作在静态雪崩模式下时, 器件内部的电流密度分布(横向电流密度分布在J₂结处被截取得到)

Figure 10. Simulated current density distributions inside the FS-IGBTs with different N_P+ working in static avalanche mode in isothermal case (lateral current density distribution is along the J₂ junction).

DownLoad: Full-Size Img PowerPoint

图 11 热电仿真的N_P+ = 2×10¹⁷ cm^–3和N_P+ = 1×10¹⁸ cm^–3 FS-IGBT工作在静态雪崩模式下时, V_CE和最高晶格温度T_max随时间变化曲线(所施加的电流脉冲与图9完全相同)

Figure 11. Simulated V_CE and maximum lattice temperature T_max vs. time curves for FS-IGBTs with different N_P+ working in static avalanche mode in electrothermal case (applied current pulse is the same as Fig. 9).

DownLoad: Full-Size Img PowerPoint

DownLoad: Full-Size Img PowerPoint

图 12 热电仿真的N_P+ = 2×10¹⁷ cm^–3和N_P+ = 1×10¹⁸ cm^–3 FS-IGBT工作在静态雪崩模式下时, 器件内部的电流分布(横向电流密度分布在J₂结处被截取得到)

Figure 12. Simulated current density distributions inside the FS-IGBTs with different N_P+ working in static avalanche mode in electrothermal case (lateral current density distribution is along the J₂ junction).

DownLoad: Full-Size Img PowerPoint

[1]	Egawa H 1966 IEEE Trans. Electron. Devices 13 754 Google Scholar
[2]	Baburske R, Lutz J, Heinze B 2010 IEEE 2010 IEEE International Reliability Physics Symposium-Garden Grove (Anaheim) CA, USA, May 2–6, 2010 p162
[3]	Hower P L, Reddi V K 2005 IEEE Trans. Electron. Devices 17 320 Google Scholar
[4]	Schulze H J, Niedernostheide F J 2013 IEEE Trans. Electron. Devices 60 551 Google Scholar
[5]	Knipper U, Wachutka G, Pfirsch F, et al. 2008 International Symposium on Power Semiconductor Devices & IC's Orlando, USA, May 18–22, 2008 p307
[6]	Tong X, Liu S, Sun W, et al. 2020 IEEE Trans. Electron. Devices 67 3908 Google Scholar
[7]	Endo K, Nakamae K 2019 IEEE Trans. Device Mater. Reliab. 19 723 Google Scholar
[8]	Bhojani R, Kowalsky J, Lutz J, et al. 2018 International Symposium on Power Semiconductor Devices and IC’s Palmer House Hilton, USA, May 13–17, 2018 p164
[9]	Lutz J, Baburske R, Chen M, et al. 2009 IEEE Trans. Electron. Devices 56 2825 Google Scholar
[10]	Lutz J, Schlangenotto H, et al. 2018 Semiconductor Power Devices: Physics, Characteristic, Reliability (Switzerland: Springer International Publishing)
[11]	Spirito P, Breglio G, Irace A, et al. 2014 IEEE Trans. Electron. Devices 61 1457 Google Scholar
[12]	Baliga B J 2013 IEEE Trans. Electron. Devices 60 535 Google Scholar
[13]	Heinze B, Felsl H P, Mauder A, et al. 2005 International Symposium on Power Semiconductor Devices & IC’s CA, USA, May 13–17, 2005 p159
[14]	Wang C, Zhang L 2017 IEICE Electron. Express 14 1 Google Scholar
[15]	Breglio G, Irace A, Napoli E, et al. 2013 IEEE Trans. Electron. Devices 60 563 Google Scholar
[16]	Knipper U, Pfirsch F, Raker T, et al. 2008 International Conference on Advanced Semiconductor Devices and Microsystems Smolenice, Slovakia, Oct. 12–16, 2008 p159
[17]	Felsl H P, Falck E, Niedernostheide F J, et al. 2006 International Symposium on Power Semiconductor Devices & IC’s Smolenice, Slovakia, June 4–8, 2006 p1
[18]	Tong X, Liu S, Sun W, et al. 2020 Trans. Electron. Devices 67 3908
[19]	Niedernostheide F J, Falck E, Schulze H J, et al. 2006 IEEP. Circ. Dev. Syst. 153 3 Google Scholar
[20]	Shiba Y, Omura I, Tsukuda M 2016 28 th International Symposium on Power Semiconductor Devices & IC’s Prague, Czech Republic, June 12–16, 2016 p339
[21]	Watanabe M, Shigyo N, Hoshii T, et al. 2019 International Symposium on Power Semiconductor Devices and IC’s Shanghai, China, May 19–23, 2019 p311

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Vol. 72, Issue 7 - 2023-04-05

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