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针对削弱暗计数噪声对单光子雪崩二极管(single-photon avalanche diode, SPAD)探测器的影响, 本文研究了采用多晶硅场板降低SPAD器件暗计数率(dark count rate, DCR)的机理和方法. 基于0.18-μm 标准CMOS工艺, 在一种可缩小的P+/P阱/深N阱器件结构的P+有源区和浅沟道隔离区(shallow trench isolation, STI)之间淀积了一层多晶硅场板来减小器件暗计数噪声. 测试结果表明, 多晶硅场板的淀积使SPAD器件的DCR降低了一个数量级, 其在高温下的暗计数性能甚至优于室温下的未淀积多晶硅场板的器件. 通过TCAD仿真进一步发现, SPAD器件保护环区域的峰值电场被多晶硅场板引入到STI内部, 保护环区域的整体电场降低了25%; 最后通过对DCR的建模计算得出, 多晶硅场板削弱了具有高缺陷密度的保护环区域的电场, 使缺陷相关DCR显著降低, 从而有效改善了SPAD的暗计数性能.To suppress the effect of dark count noise on single photon avalanche diode (SPAD) detector, the mechanism and method of reducing the dark count rate (DCR) of SPAD device by using a polysilicon field plate is studied in this paper. Based on the 0.18-μm standard CMOS process, a polysilicon field plate located between the P+ active region and shallow trench isolation (STI) is deposited to reduce the dark count noise for a scaleable P+/P-well/deep N-well SPAD structure. Test results show that the DCR of SPAD device decreases by an order of magnitude after the deposition of polysilicon field plates, and its dark count performance at high temperature is even better than that of device without polysilicon field plate at room temperature. The TCAD simulation further indicates that the peak electric field in the guard ring region of the SPAD device is introduced into the STI by the field plate, and the overall electric field in the guard ring region is reduced by 25%. Finally, through modeling and calculating the DCR, the polysilicon field plate weakens the electric field of the guard ring region with high trap density, hence the trap-related DCR is significantly reduced. Therefore, the dark count performance of SPAD detector is effectively improved.
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Keywords:
- single-photon avalanche diode (SPAD) /
- dark count rate (DCR) /
- polysilicon field plate /
- trap-assisted tunneling (TAT)
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图 1 淀积了多晶硅场板的P+/P阱/深N阱SPAD器件结构示意图
Fig. 1. Structure of the P+/P-well/deep N-well SPAD device with polysilicon field plate.
图 6 室温下SPAD暗计数率与过偏压关系
Fig. 6. DCR as a function of excess bias voltage at room temperature.
图 7 SPAD_2的DCR变化曲线图 (a) 不同过偏压下的温度特性; (b) 不同温度下的过偏压特性
Fig. 7. DCR of SPAD_2 as a function of (a) temperature at different excess bias voltage, and (b) excess bias voltage at different temperature.
图 8 TCAD二维电场仿真图 (a) SPAD_1; (b) SPAD_2
Fig. 8. TCAD simulation of 2D electric field: (a) SPAD_1; (b) SPAD_2.
图 9 模型算得室温下SPAD暗计数率与过偏压关系图
Fig. 9. Calculated DCR as a function of excess bias voltage at room temperature.
图 10 室温下0—10 V过偏压范围内的DCR变化情况
Fig. 10. Variety of DCR under 0–10 V excess bias voltage at room temperature.
表 1 关键模型参数取值 (温度T = 300 K, 过偏压VEX = 0.4 V)
Table 1. Summary of the key parameters for model-ing (T = 300 K, VEX = 0.4 V).
参数 描述 值 Aa/μm2 雪崩区面积 63.6 Ar/μm2 保护环区域面积 49.4 Wa/μm 雪崩区厚度 0.8 Wr/μm 保护环区域厚度 0.8 Pa 雪崩区平均雪崩触发概率 0.09 $ m_{\rm n}^*/m_0 $ 电子有效质量 0.43 $ m_t^*/m_0 $ 电子隧穿有效质量 0.25 m0/10–31 kg 电子静止质量 9.108 ni/1010 cm–3 本征载流子浓度 1.5 k/10–23 J·K-1 玻尔兹曼常数 1.38 $\hbar $/10–34 J·s 狄拉克常数 1.054 q/10–19 C 电子电荷量 1.602 
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[1] Villa F, Lussana R, Bronzi D, Tisa S, Tosi A, Zappa F, Mora A D, Contini D, Durini D, Weyers S, Brockherde W 2014 IEEE J. Sel. Top. Quantum Electron. 20 364
Google Scholar
[2] 白鹏, 张月蘅, 沈文忠 2018 物理学报 67 221401
Google Scholar
Bai P, Zhang Y H, Shen W Z 2018 Acta Phys. Sin. 67 221401
Google Scholar
[3] 胡伟达, 李庆, 陈效双, 陆卫 2019 物理学报 68 120701
Google Scholar
Hu W D, Li Q, Chen X S, Lu W 2019 Acta Phys. Sin. 68 120701
Google Scholar
[4] Perenzoni M, Massari N, Perenzoni D, Gasparini L, Stoppa D 2016 IEEE J. Solid-State Circuits 51 155
Google Scholar
[5] Pancheri L, Stoppa D, Dalla Betta G F 2014 IEEE J. Sel. Top. Quantum Electron. 20 328
Google Scholar
[6] Bronzi D, Villa F, Bellisai S, Tisa S, Paschen U 2013 Proc. SPIE-Int. Soc. Opt. Eng. 8631 241
Google Scholar
[7] Xu Y, Xiang P, Xie X P 2017 Solid-State Electron. 129 168
Google Scholar
[8] Xu Y, Xiang P, Xie X P, Huang Y 2016 Semicond. Sci. Technol. 31 065024
Google Scholar
[9] Moreno-García M, Xu H S, Gasparini L, Perenzoni M 2018 2018 48th European Solid-State Device Research Conference (ESSDERC) Dresden, Germany, Sept. 3–6, 2018 p94
[10] Webster E A G, Richardson J A, Grant L A, Renshaw D, Henderson R K 2012 IEEE Electron Device Lett. 33 694
Google Scholar
[11] Bose S, Ouh H, Sengupta S, Johnston M L 2018 IEEE Sens. J. 18 5291
Google Scholar
[12] 金湘亮, 曾朵朵, 彭亚男, 杨红姣, 蒲华燕, 彭艳, 罗均 2019 红外与毫米波学报 38 403
Google Scholar
Jing X L, Zeng D D, Peng Y N, Yang H J, Pu H Y, Peng Y, Luo J 2019 J. Infrared Millim. W. 38 403
Google Scholar
[13] Shin D, Park B, Chae Y, Yun L 2019 IEEE Trans. Electron Devices 66 2986
Google Scholar
[14] Accarino C, Al-Rawhani M, Shah Y D, Maneuski D, Mitra S, Buttar C, Cumming D R S 2018 2018 IEEE International Symposium on Circuits and Systems (ISCAS) Florence, Italy, May 27–30, 2018 p1
[15] Liu Y, Forrest S R, Hladky J, Lange M J, Olsen G H, Ackley D E 1992 J. Lightwave Technol. 10 182
Google Scholar
[16] Li Q, Wang F, Wang P, Zhang L L, He J L, Chen L, Martyniuk P, Rogalski A, Chen X S, Lu W, Hu W D 2020 IEEE Trans. Electron Devices 67 542
Google Scholar
[17] Richardson J A, Webster E A G, Grant L A, Henderson R K 2011 IEEE Trans. Electron Devices 58 2028
Google Scholar
[18] Wang C, Wang J Y, Xu Z Y, Wang R, Li J H, Zhao J Y, Wei Y M, Lin Y 2019 Optik 185 1134
Google Scholar
[19] Cheng Z, Zheng X Q, Palubiak D, Deen M J, Peng H 2016 IEEE Trans. Electron Devices 63 1940
Google Scholar
[20] Xu Y, Zhao T C, Li D 2018 Superlattices Microstruct. 113 635
Google Scholar
[21] Hurkx G A M, Klaassen D B M, Knuvers M P G 1992 IEEE Trans. Electron Devices 39 331
Google Scholar
[22] 毛维, 杨翠, 郝跃, 张进成, 刘红侠, 马晓华, 王冲, 张金风, 杨林安, 许晟瑞, 毕志伟, 周洲, 杨凌, 王昊 2011 物理学报 60 017205
Google Scholar
Mao W, Yang C, Hao Y, Zhang J C, Liu H X, Ma X H, Wang C, Zhang J F, Yang L A, Xu S R, Bi Z W, Zhou Z, Yang L, Wang H 2011 Acta Phys. Sin. 60 017205
Google Scholar
[23] 刘建华, 郭宇锋, 黄晓明, 黄智, 姚小江 2020 南京邮电大学学报(自然科学版) 40 9
Google Scholar
Liu J H, Guo Y F, Huang X M, Huang Z, Yao X J 2020 J. Nanjing Univ. Post. Telecom. (Nat.Sci.Ed.) 40 9
Google Scholar
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