[1] |
Jia Xin, Liu Qiang, Mu Zhi-Qiang, Zhou Hong-Yang, Yu Wen-Jie. Fabrication technology of void embedded silicon-on-insulator substrate. Acta Physica Sinica,
2023, 72(12): 127302.
doi: 10.7498/aps.72.20230198
|
[2] |
Tang Chun-Ping, Duan Bao-Xing, Song Kun, Wang Yan-Dong, Yang Yin-Tang. Analysis of novel silicon based lateral power devices with floating substrate on insulator. Acta Physica Sinica,
2021, 70(14): 148501.
doi: 10.7498/aps.70.20202065
|
[3] |
Xu Huo-Xi, Xu Jing-Ping. Electrical properties of LaTiO high-k gate dielectric Ge MOS Capacitor and Ti content optimization. Acta Physica Sinica,
2016, 65(3): 037301.
doi: 10.7498/aps.65.037301
|
[4] |
Shi Yan-Mei, Liu Ji-Zhi, Yao Su-Ying, Ding Yan-Hong, Zhang Wei-Hua, Dai Hong-Li. A dual-trench silicon on insulator high voltage device with an L-shaped source field plate. Acta Physica Sinica,
2014, 63(23): 237305.
doi: 10.7498/aps.63.237305
|
[5] |
Bai Yu-Rong, Xu Jing-Ping, Liu Lu, Fan Min-Min, Huang Yong, Cheng Zhi-Xiang. Modeling on drain current of high-k gate dielectric fully-depleted nanoscale germanium-on-insulator p-channel metal-oxide-semiconductor field-effect transistor. Acta Physica Sinica,
2014, 63(23): 237304.
doi: 10.7498/aps.63.237304
|
[6] |
Wang Xiao-Wei, Luo Xiao-Rong, Yin Chao, Fan Yuan-Hang, Zhou Kun, Fan Ye, Cai Jin-Yong, Luo Yin-Chun, Zhang Bo, Li Zhao-Ji. Mechanism and optimal design of a high-k dielectric conduction enhancement SOI LDMOS. Acta Physica Sinica,
2013, 62(23): 237301.
doi: 10.7498/aps.62.237301
|
[7] |
Xu Li-Jun, Zhang He-Ming. Drain-induced barrier-lowering effect in surrounding-gate schottky barrier metal-oxide semiconductor field transistor. Acta Physica Sinica,
2013, 62(10): 108502.
doi: 10.7498/aps.62.108502
|
[8] |
Cao Lei, Liu Hong-Xia. Study of the SOI MOSFET characteristics of high-k gate dielectric with quantum effect. Acta Physica Sinica,
2012, 61(24): 247303.
doi: 10.7498/aps.61.247303
|
[9] |
Qu Jiang-Tao, Wang Xiao-Yan, Zhang He-Ming, Wang Guan-Yu, Song Jian-Jun, Qin Shan-Shan. Drain-induced barrier-lowering effects on threshold voltage in short-channel strained Si metal-oxide semiconductor field transistor. Acta Physica Sinica,
2011, 60(2): 027102.
doi: 10.7498/aps.60.027102
|
[10] |
Zhang Bing, Chai Chang-Chun, Yang Yin-Tang. Effect of distances from source or drain to the gate on the robustness of sub-micron ggNMOS ESD protection circuit. Acta Physica Sinica,
2010, 59(11): 8063-8070.
doi: 10.7498/aps.59.8063
|
[11] |
Li Jin, Liu Hong-Xia, Li Bin, Cao Lei, Yuan Bo. Threshold voltage analytical model for strained Si SOI MOSFET with high-k dielectric. Acta Physica Sinica,
2010, 59(11): 8131-8136.
doi: 10.7498/aps.59.8131
|
[12] |
Liu Yu-Rong, Chen Wei, Liao Rong. Low-operating-voltage polymer thin-film transistors based on poly(3-hexylthiophene). Acta Physica Sinica,
2010, 59(11): 8088-8092.
doi: 10.7498/aps.59.8088
|
[13] |
Tang Xiao-Yan, Zhang Yi-Men, Zhang Yu-Ming. The threshold voltage of SiC Schottky barrier source/drain MOSFET. Acta Physica Sinica,
2009, 58(1): 494-497.
doi: 10.7498/aps.58.494
|
[14] |
Ding Hong-Lin, Liu Kui, Wang Xiang, Fang Zhong-Hui, Huang Jian, Yu Lin-Wei, Li Wei, Huang Xin-Fan, Chen Kun-Ji. Effect of control oxide on the performance of nanocrystalline silicon based double-barrier floating gate memory structure. Acta Physica Sinica,
2008, 57(7): 4482-4486.
doi: 10.7498/aps.57.4482
|
[15] |
Luan Su-Zhen, Liu Hong-Xia, Jia Ren-Xu, Cai Nai-Qiong. 2-D analytical modeling of dual material gate fully depleted SOI MOSFET with high-k dielectric. Acta Physica Sinica,
2008, 57(6): 3807-3812.
doi: 10.7498/aps.57.3807
|
[16] |
Li Yan-Ping, Xu Jing-Ping, Chen Wei-Bing, Xu Sheng-Guo, Ji Feng. 2-D threshold voltage model for short-channel MOSFET with quantum-mechanical effects. Acta Physica Sinica,
2006, 55(7): 3670-3676.
doi: 10.7498/aps.55.3670
|
[17] |
Sa Ning, Kang Jin-Feng, Yang Hong, Liu Xiao-Yan, Zhang Xing, Han Ru-Qi. Negative bias temperature instability of HfN/HfO2 gated p-MOSFETs. Acta Physica Sinica,
2006, 55(3): 1419-1423.
doi: 10.7498/aps.55.1419
|
[18] |
Guo De-Feng, Geng Wei-Gang, Lan Wei, Huang Chun-Ming, Wang Yin-Yue. Fabrication and properties of the Y-doped Al2O3 high-k gate dielectric films. Acta Physica Sinica,
2005, 54(12): 5901-5906.
doi: 10.7498/aps.54.5901
|
[19] |
Wang Yuan, Zhang Yi-Men, Zhang Yu-Ming, Tang Xiao-Yan. A simulation study of 6H-SiC Schottky barrier source/drain MOSFET. Acta Physica Sinica,
2003, 52(10): 2553-2557.
doi: 10.7498/aps.52.2553
|
[20] |
LIN HONG-YI. AN INVESTIGATION OF THE IMPURITY PROFILE OF THE 4mm BAND SILICON AVALANCHE DIODE BY MEANS OF THE SCHOTTKY BARRIER CHARACTERISTICS. Acta Physica Sinica,
1978, 27(3): 291-302.
doi: 10.7498/aps.27.291
|