3D NAND flash memory stands as a pivotal technology in the domain of mainstream memory solutions, primarily due to its exceptionally low bit cost. The architecture of 3D NAND, characterized by its vertically stacked design, substantially enhances the capacity of individual chips. This advancement aligns perfectly with the demands for high-capacity data storage in contemporary settings, securing its widespread adoption across diverse application scenarios. As storage densities increase, so does the complexity of process integration, introducing new challenges. The word lines in 3D NAND are typically filled using gate replacement techniques, with Atomic Layer Deposition (ALD) favored for its superior step-coverage, especially for depositing tungsten (W) at the gate, compared to Chemical Vapor Deposition (CVD). However, due to the complexity of the replacement gate deposition structure, fluorine (F) residues are found in the voids of the tungsten metal gate filling structure and diffuse into the surrounding structure under subsequent process conditions, corroding other films such as silicon oxide and degrading device performance and reliability. To ameliorate the fluorine attack problem, a thin layer of titanium nitride is usually deposited as a barrier layer before tungsten gate deposition, which blocks the fluorine in the tungsten gate and prevents it from diffusing into the oxide layer. Previously, there are studies to increase the ability to stop F diffusion by varying the thickness of the F blocking layer (TiN). However, increasing the thickness of TiN will further exacerbate the complexity of high aspect ratio etching in the 3D NAND process, thereby adversely affecting subsequent processes. To further minimize the effect of fluorine attack, residual fluorine elements can also be expelled by introducing annealing in the subsequent process stream. In the actual 3D NAND process, elemental fluorine (F) is adsorbed and accumulates on the TiN surface, and is further activated by subsequent high-temperature processes, leading to severe fluorine attack. The delay between TiN deposition and subsequent processing steps is hypothesized to facilitate fluorine adsorption due to the oxidation of TiN. This paper corroborates the hypothesis through first-principles calculations, demonstrating the role of TiN oxidation in fluorine adsorption. This paper evaluates the impact of this oxidation on the fluorine-blocking effectiveness of the TiN barrier layer. We simulate the adsorption of fluorine-containing by-products on TiN and its oxides, providing theoretical insights into mitigating fluorine attack. The higher degree of TiN oxidation is more likely to cause F adsorption, and Ti exposed surface TiN is more prone to oxidation, which is more likely to cause F adsorption in both unoxidized and oxidized conditions. Based on these insights, we implemented an ammonia purge treatment in 3D NAND manufacturing, which effectively minimized fluorine attack, reducing word line leakage probability by 25 % and wafer warpage by 43 %.