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通过在基本单元上集成存储和计算功能, 存内计算技术能够显著降低数据搬运规模, 被广泛认为是突破传统冯·诺依曼计算架构性能瓶颈的新型计算范式. 非挥发存储器件兼具非易失特性和存算融合功能, 是实现存内计算的良好功能器件. 本文首先介绍了存内计算范式的基本概念, 包括技术背景和技术特征. 然后综述了用于实现存内计算的非挥发存储器件及其性能特征, 包含传统闪存器件和新型阻变存储器; 进一步介绍了基于非挥发存储器件的存内计算实现方法, 包括存内模拟运算和存内数字运算. 之后综述了非挥发存内计算系统在深度学习硬件加速、类脑计算等领域的潜在应用. 最后, 对非挥发型存内计算技术的未来发展趋势进行了总结和展望.By integrating the storage and computing functions on the fundamental elements, computing in-memory (CIM) technology is widely considered as a novel computational paradigm that can break the bottleneck of Von Neumann architecture. Nonvolatile memory device is an appropriate hardware implementation approach of CIM, which possess significantly advantages, such as excellent scalability, low consumption, and versatility. In this paper, first we introduce the basic concept of CIM, including the technical background and technical characteristics. Then, we review the traditional and novel nonvolatile memory devices, flash and resistive random access memory (RRAM), used in non-volatile based computing in-memory (nvCIM) system. After that, we explain the operation modes of nvCIM: in-memory analog computing and in-memory digital computing. In addition, the applications of nvCIM are also discussed, including deep learning accelerator, neuromorphic computing, and stateful logic. Finally, we summarize the current research advances in nvCIM and provide an outlook on possible research directions in the future.
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Keywords:
- in-memory computing /
- non-volatile memory /
- flash /
- resistive random access memory
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图 1 传统计算范式分类 (a) 存算分离计算; (b) 近存计算; (c) 存内计算
Fig. 1. Classification of the traditional computational paradigms: (a) Separated memory and logic computing; (b) near memory computing; (c) in-memory computing.
图 3 新型NVM器件RRAM (a) 常见阻变行为[46]; (b) 双极型RRAM的典型I-V特性曲线; (c) 基于氧空位的阻变物理机制模型[46]; (d) 常见RRAM单元结构包括1R, 1S1R和 1T1R
Fig. 3. RRAM, a novel NVM device: (a) Typical resistive switch behavior[46]; (b) the typical I-V curve of bipolar RRAM device; (c) the physical mechanism of oxide-based RRAM[46]; (d) the typical basic unit based on RRAM include 1R, 1S1R and 1T1R.
图 4 向量-矩阵运算模式 (a) 基本原理; (b) 矩阵编码模式[52]; (c) 器件状态波动性对编码的影响[52]; (d) 向量编码模式[53]; (e) 正负输入和权重的运算方法[54]; (f) 器件I-V非线性[56]; (g) 交叉阵列互联电阻[57]
Fig. 4. Vector-matrix operation mode: (a) The basic principle; (b) matrix encode (mapping) scheme[52]; (c) impact of device variation on the matrix encode[52]; (d) input vector encode schemes[53]; (e) the operation method of positive and negative input and weight[54]; (f) the nonlinearity I-V behavior of device[56]; (g) the interconnect resistance of cross-bar array[57].
图 5 向量-向量运算模式 (a) 基本原理; (b) 向量形式的矩阵-矩阵乘积运算[58]; (c) 尖峰时间依赖可塑性学习规则[59]; (d) 一种基于RRAM的半加器实现方式[60]; (e) 典型NVM器件存储状态饱和限制[61]
Fig. 5. Vector-vector operation mode: (a) The basic principle; (b) the matrix-matrix multiplication based on vector form[58]; (c) the spike time dependent plasticity learning rule[59]; (d) the half-adder implementation approach based on RRAM[60]; (e) the saturation limited states range of typical NVM device[61].
图 6 存内数字运算模式 (a) 常见逻辑真值表; 基于SRAM (b)和DRAM (c)的逻辑实现方案示例[26]; 基于NVM器件的逻辑 (d) V-R型, (e) R-V型, (f) V-V型, (g) R-R型
Fig. 6. In-memory digital computing mode: (a) The true value table of typical logic; SRAM (b) and DRAM (c) based logic implementation[26]; logics based on NVM device: (d) V-R type, (e) R-V type, (f) V-V type, (g) R-R type.
图 7 存内计算加速深度学习 (a) 常见深度学习算法分类[70]; (b) 存内计算加速深度学习的基本原理[50]; (c) 深度学习各功能的存内计算实现方式; (d) 利用二值神经网络算法克服器件非线性的影响[71]; (e) 器件操作优化方案[72]; (f) 利用激励信号波形抑制器件波动性[72]; (g) 基于存内计算的深度学习加速器的典型架构[73]; (h) 流水线硬件实现方法加速网络运算效率; (i) 神经网络稀疏性表现形式, 结构化和非结构化; (j) 减少输入信息搬运的数据调用方案[74]
Fig. 7. In-memory computing based deep learning accelerator: (a) The classes of deep learning algorithms[70]; (b) the basic principle of in-memory computing accelerates deep learning algorithm[50]; (c) in-memory computing implementation of deep learning functions; (d) solve the impact of device non-linearity switch behavior by binarized neural network[71]; (e) the optimized programming scheme of device[72]; (f) improve the device reliability by optimizing the stimulus signal[72]; (g) typical architecture of deep learning accelerators based on in-memory computing[73]; (h) pipeline weight mapping approach to speed up network computing efficiency; (i) the sparsening of neural network: structured and unstructured; (j) data call scheme to reduce input information handling[74].
图 8 基于存内计算技术的类脑计算研究 (a) 生物突触结构; 利用NVM器件实现突触的(b) LTP, (c) STP 和长短程可塑性转变; (d) 双脉冲易化响应特性[80]; (e) 尖峰脉冲频率依赖可塑性[80]; (f) 尖峰脉冲时间依赖可塑性[80]; (g) RRAM中的Bienenstock-Cooper-Munro 权重更新规则[82]; (h) 生物神经元结构[83]; (i) 基于RRAM的神经元树突非线性调制功能[83]; (j) 神经元积分触发功能[84]; (k) 基于尖峰脉冲频率依赖可塑性的脉冲神经网络非监督学习功能[85]; (l) 霍普菲德网络学习规则[86]; (m) 生物神经网络理论模型[87]; (n) 脉冲神经网络实现方案[75]
Fig. 8. Neuromorphic computing based on in-memory computing: (a) The biological synapse; (b) LTP, (c) STP and the conversation between STP and LTP of NVM device based artificial synapse; (d) double pulse facilitated response characteristics[80]; (e) the spike rate dependent plasticity (SRDP) [80]; (f) the spike-time dependent plasticity (STDP) [80]; (g) the Bienenstock-Cooper-Munro weight update rules in RRAM[82]; (h) the principle of biological neural[83]; (i) the signal modulation capability of the RRAM based artificial dendrite[83]; (j) neuron integration-fire function[84]; (k) unsupervised online training follows the spike rate dependent plasticity based spike neural network learning rule[85]; (l) the Hopfield eLearning rules[86]; (m) the model of biological neural network[87]; (n) implementation of spiking neural network[75].
图 9 非易失状态逻辑 (a) IMP逻辑实现方案[91]; (b) 状态逻辑运算核架构[93]; (c) 基于1T1R的状态逻辑[94]; (d) 利用1T1R结构抑制交叉阵列串扰[94]; (e) 利用寄生电容替代辅助RRAM的状态逻辑[95]
Fig. 9. Non-volatile stateful logic: (a) implementation scheme based IMP logic[91]; (b) the architecture of stateful logic process core[93]; (c) 1T1R based stateful logic[94]; (d) reduce the impact of sneak path by 1T1R structure[94]; (e) parasitic capacitor assisted RRAM based stateful logic[95]
图 10 (a) CAM基本实现方式[91]; (b)基于SRAM的TCAM基本单元[93]; (c)基于STT-RAM的TCAM基本单元[97]; (d)基于RRAM的TCAM基本单元[98]; (e)基于NAND型 flash的TCAM实现方式[99]; (f)匹配与失配的输出结果示例[99]
Fig. 10. (a) Typical structure of CAM[91]; (b) TCAM basic unit based on SRAM[93]; (c) TCAM basic unit based on STT-RAM[97]; (d) TCAM basic unit based on RRAM[98]; (e) based implementation of TCAM based on NAND flash[99]; (f) example of the matched and mismatched results[99].
图 11 线性方程组求解器 (a) 高精度线性方程求解器实现方法[100]; (b) 混合精度求解器架构[101]; (c) 正权重矩阵求逆[19]; (d) 求解特征向量方程Ax = λx [19]; (e) 混合矩阵求逆[19]
Fig. 11. Linear equations solver: (a) The implementation of high-precision linear equation solver[100]; (b) the mixed-precision solver architecture[101]; (c) inverting a positive weight matrix[19]; (d) solve eigenvector equation Ax = λx [19]; (e) inverting a mixed matrix[19].
图 12 (a) SC乘法工作原理[104]; (b) RRAM阻变过程的随机性[104]; (c) 随机电报噪声特性; (d) 基于PUF的射频识别工作原理[106]; (e)基于RRAM器件的PUF架构[107]; (f) HDC分类原理[109]; (g) 基于NVM器件交叉阵列的稀疏编码[113]
Fig. 12. (a) The multiplication operation realized by SC[104]; (b) the random behavior of RRAM[104]; (c) noise characteristics of random telegram; (d) the operating principle of PUF based radio frequency identification[106]; (e) the architecture of RRAM based PUF[107]; (f) classification overview with HDC[109]; (g) sparse coding in NVM device based crossbar array[113].
表 1 存内计算模式的特征
Table 1. Feature of in-memory computing modes
存内模拟计算 存内数字运算 功能 布尔逻辑, 代数运算 布尔逻辑 优势 高运算密度, 高并行度,
缓解数据搬运精确计算, 高并行度,
缓解数据搬运挑战 运算精度, 模数转化 器件鲁棒性、波动性 应用 深度学习、类脑计算等 逻辑电路、嵌入式存储 
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