A novel LDMOS with dual-drift region and dual-conduction path with ultra-low specific on-resistance

DUAN Baoxing; REN Yuhao; TANG Chunping; YANG Yintang

doi:10.7498/aps.74.20241554

Abstract

In order to improve the contradictory between specific on-resistance (R_on,sp) and breakdown voltage (BV) of lateral double-diffused metal oxide semiconductor (LDMOS) and enhance the turn-off characteristic, this paper proposes a novel LDMOS device with dual-drift regions and dual-conduction paths, which achieves an ultra-low R_on,sp. The key feature of the proposed device is the introduction of a dual-drift region structure with alternating P-type and N-type regions, combined with planar and trench gates to control the P-type and N-type drift regions, respectively. This configuration enables the formation of two independent electron conduction paths within the drift region. When a positive voltage is applied to the planar gate, a voltage difference is generated between the surface of the P-type drift region and the body of device’s drift. Therefore, under the influence of the voltage difference, the electrons are pulled to the surface of the P-type drift region to invert and form a high-density electron inversion layer that connects the channel and the N+ drain, significantly increasing the electron density during conduction and reducing the R_on,sp. The introduction of the trench gate provides an additional electron disappearance path, which shortens the device's turn-off time (t_off). Furthermore, the introduction of the P-type drift region facilitates the recombination of electrons with holes within the P-type drift region, accelerating the electron disappearance process and further reducing the device’s t_off. Furthermore, the proposed device exhibits a more uniform electric field distribution and higher voltage capability is due to the P+N-N+P+ structure adopted in the PolySi-top layer. During the off-state, both the P+N- junctions and the N+P+ junctions generate electric field peaks at the interfaces. These peaks modulate the electric field distribution across the surface of the drift region. Simulation results indicate that at the BV with a level of 200V, the proposed LDMOS exhibits an R_on,sp of 3.43 mΩ·cm² and a t_off of 9 ns. Compared with conventional LDMOS devices, the proposed LDMOS possesses a 90% reduction in R_on,sp and an 11.6% decrease in t_off. The proposed device not only achieves an excellent trade-off between R_on,sp and BV but also shortens the t_off, demonstrating that the device achieves superior performance.

Keywords:

Authors and contacts

Key Laboratory of the Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi’an 710071, China

Corresponding author: DUAN Baoxing, bxduan@163.com

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References

[1]	Kong M, Yi B, Zhang B 2019 IEEE T. Electron. Dev. 66 592 Google Scholar
[2]	Disney D, Chan W, Lam R, Blattner R, Ma S, Seng W, Chen J W, Cornell M, Williams R 2008 20th International Symposium on Power Semiconductor Devices and IC’s Orlando, FL, USA, May 18–22, 2008 pp24–27
[3]	Sun W, Shi L, Sun Z, Yi Y, Li H, Lu S 2006 IEEE T. Electron. Dev. 53 891 Google Scholar
[4]	Erlbacher T, Bauer A J, Frey L 2010 IEEE Electron Device Lett. 31 464 Google Scholar
[5]	Qiao M, Li Y, Zhou X, Li Z, Zhang B 2014 IEEE Electron Device Lett. 35 774 Google Scholar
[6]	Baliga B J 2001 Proc. IEEE 89 822 Google Scholar
[7]	Efland T R, Tsai C Y, Pendharkar S 1998 International Electron Devices Meeting 1998 San Francisco, CA, USA, December 6–9, 1998 pp679–682
[8]	Li M, Chen D, Jung D S, Shi X 2019 2019 China Semiconductor Technology International Conference Shanghai, China, March 17–18, 2019, pp1–3
[9]	Baliga B J 2023 Springer Handbook of Semiconductor Devices (Cham: Springer Nature) pp491–523
[10]	Baliga B J 2019 Fundamentals of Power Semiconductor Devices (Cham: Springer International Publishing
[11]	Appels J A, Vaes H M J 1979 1979 International Electron Devices Meeting December, 1979, pp238–241
[12]	Hossain Z 2008 2008 20th International Symposium on Power Semiconductor Devices and IC’s Orlando, FL, USA, May 18–22, 2008 pp133–136
[13]	Xiarong H, Bo Z, Xiaorong L, Guoliang Y, Xi C, Zhaoji L 2011 J. Semicond. 32 074006 Google Scholar
[14]	Hardikar S, Tadikonda R, Green D W, Vershinin K V, Narayanan E M S 2004 IEEE T. Electron. Dev. 51 2223 Google Scholar
[15]	Stengl R, Gosele U 1985 1985 International Electron Devices Washington, DC, USA, December 1–4, 1985 pp154–157
[16]	Duan B, Xing L, Wang Y, Yang Y 2022 IEEE T. Electron. Dev. 69 658 Google Scholar
[17]	Chen Y, Hu S, Cheng K, Jiang Y, Luo J, Wang J, Tang F, Zhou X, Zhou J, Gan P 2016 Micro. Nanostructures 89 59
[18]	Fujihira T 1997 Jpn. J. Appl. Phys. 36 6254 Google Scholar
[19]	Chen X B 2000 Chin. J. Electron. 9 6
[20]	Baliga B J, Syau T, Venkatraman P 1992 IEEE Electron Device Lett. 13 427 Google Scholar
[21]	Wang Y D, Duan B X, Song H T, Yang Y T 2021 IEEE T. Electron. Dev. 68 2414 Google Scholar
[22]	Inc. Synopsys 2016 Sentaurus^TM Device User Guide Verison L-2016.03
[23]	Chen W Z, Qin H F, Zhang H S, Han Z S 2022 IEEE T. Electron. Dev. 69 1900 Google Scholar
[24]	Zhou K, Luo X R, Li Z J, Zhang B 2015 IEEE T. Electron. Dev. 62 3334 Google Scholar
[25]	Cao Z, Sun Q, Zhang H W, Wang Q, Ma C F, Jiao L C 2022 Micromachines 13 843 Google Scholar
[26]	Cheng J, Zhang B, Li Z 2008 IEEE Electron Device Lett. 29 645 Google Scholar
[27]	Chen Y M, Lee C L, Tsai M H, Lee C T, Wang C C 2018 2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs Chicago, IL, USA, May 13–17, 2018 pp331–334
[28]	Zhang S, Tuan H C, Wu X J, Shi L, Wu J 2016 Microelectron. Reliab. 61 125 Google Scholar
[29]	Chen W, Pjencak J, Agam M, Janssens J, Jerome R, Menon S, Griswold M 2021 2021 33rd International Symposium on Power Semiconductor Devices and ICs Nagoya, Japan, May 30–June 03, 2021 pp287–290
[30]	Qiao M, Liu W, Yuan L, Xu P, Ma C, Lin F, Liu K, Guo Y, Lin Z, Zhang S, Zhang B 2022 2022 IEEE 34th International Symposium on Power Semiconductor Devices and ICs Vancouver, BC, Canada, May 22–25, 2022 pp149–152
[31]	Kong M, Yi B, Chen X 2019 2019 IEEE 13th International Conference on Power Electronics and Drive Systems Toulouse, France, July 09–12, 2019 pp1–4
[32]	Fan J, Wang Z G, Zhang B, Luo X R 2013 Chin. Phys. B 22 048501 Google Scholar
[33]	Honarkhah S, Nassif-Khalil S, Salama C A T 2004 Proceedings of the 30th European Solid-State Circuits Conference Leuven, Belgium, September 23, 2004 pp117–120
[34]	Hölke A, Antoniou M, Udrea F 2020 2020 32nd International Symposium on Power Semiconductor Devices and ICs Vienna, Austria, September 13–18, 2020 pp435–438

Cited By

图 1 器件结构图　(a)传统LDMOS; (b) PND-DP LDMOS; (c) NND-DP LDMOS

Figure 1. Schematic cross-section: (a) Conventional LDMOS; (b) PND-DP LDMOS; (c) NND-DP LDMOS.

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图 2 器件工作原理图　(a) PND-DP LDMOS; (b) NND-DP LDMOS

Figure 2. Schematic of the proposed devices operation: (a) PND-DP LDMOS; (b) NND-DP LDMOS.

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图 3 PND-DP LDMOS器件工艺流程图

Figure 3. The fabricate process of PND-DP LDMOS.

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图 4 器件输出特性曲线

Figure 4. The I_d-V_d curve of these three devices.

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图 5 器件漂移区电子浓度分布曲线　(a) PND-DP LDMOS; (b) NND-DP LDMOS

Figure 5. Distribution of the drift electron density: (a) PND-DP LDMOS; (b) NND-DP LDMOS.

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图 6 (a)击穿特性曲线; (b) N_top对器件击穿特性的影响

Figure 6. (a) Breakdown characteristic curve; (b) the impact of N_top on device breakdown characteristics.

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图 7 器件电场分布图　(a) 横向电场; (b)纵向电场

Figure 7. Device electric field distribution: (a) Lateral electric field; (b) vertical electric field.

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图 8 N-drift 对器件性能的影响　(a) BV; (b) R_on,sp; (c) FOM

Figure 8. The impact of N-drift on device performance: (a) BV; (b) R_on,sp; (c) FOM.

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图 9 本文所提出的PND-DP LDMOS与其他器件的R_on,sp-BV比较

Figure 9. Comparison of R_on,sp-BV between the proposed PND-DP LDMOS and others.

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图 10 器件动态特性　(a)测试电路结构; (b)关断特性曲线

Figure 10. Device dynamic characteristics: (a) Test circuit structure; (b) turn-off characteristic curve.

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表 1 器件仿真中的关键参数

Table 1. Key parameters of devices’ simulation.

参数符号	参数含义	传统	PND-DP	NND-DP
T_ox/μm	氧化层厚度	0.1	0.1	0.1
L_D/μm	漂移区长度	20	8.5	8.5
T_DP/T_DN2/μm	P-drift(N-drift₂)的厚度	2	2	2
T_DN/T_DN1/μm	N-drift(N-drift₁)的厚度	—	3	3
T_b/μm	N-buffer的厚度	—	3.5	3.5
L_CH/μm	沟道长度	1.5	1.5	1.5
T_t/μm	槽栅的深度	—	2.1	2.1
N_DP/N_DN2/cm^–3	P-drift(N-drift₂)的掺杂浓度	—	1×10¹⁵	1×10¹⁵
N_DN/N_DN1/cm^–3	N-drift(N-drift₁) 的掺杂浓度	7.5×10¹⁵	2.5×10¹⁵	1.5×10¹⁵
N_top/cm^–3	N-top的掺杂浓度	—	1×10¹⁵	1×10¹⁵
N_sub/cm^–3	衬底的掺杂浓度	3×10¹⁴	3×10¹⁴	3×10¹⁴

DownLoad: CSV

表 2 PND-DP LDMOS与其他器件的R_on,sp, BV, FOM

Table 2. R_on,sp, BV, and FOM of PND-DP LDMOS compared with other devices.

Refs.	R_on,sp/(mΩ·cm²)	BV/V	FOM/(MW·cm^–2)
[23]	8.6	150	2.6
[24]	18.6	352	6.7
[25]	6.1	251	10.3
[26]	5.9	258	11.3
[27]	5.9	226	8.7
[28]	11.3	225	4.5
[29]	48	317	2.1
[30]	8.3	250	7.5
This work	3.4	215	13.3
	5.1	260	13.4
	7.6	314	13.0
	12.1	365	11.0

DownLoad: CSV

[1]	Kong M, Yi B, Zhang B 2019 IEEE T. Electron. Dev. 66 592 Google Scholar
[2]	Disney D, Chan W, Lam R, Blattner R, Ma S, Seng W, Chen J W, Cornell M, Williams R 2008 20th International Symposium on Power Semiconductor Devices and IC’s Orlando, FL, USA, May 18–22, 2008 pp24–27
[3]	Sun W, Shi L, Sun Z, Yi Y, Li H, Lu S 2006 IEEE T. Electron. Dev. 53 891 Google Scholar
[4]	Erlbacher T, Bauer A J, Frey L 2010 IEEE Electron Device Lett. 31 464 Google Scholar
[5]	Qiao M, Li Y, Zhou X, Li Z, Zhang B 2014 IEEE Electron Device Lett. 35 774 Google Scholar
[6]	Baliga B J 2001 Proc. IEEE 89 822 Google Scholar
[7]	Efland T R, Tsai C Y, Pendharkar S 1998 International Electron Devices Meeting 1998 San Francisco, CA, USA, December 6–9, 1998 pp679–682
[8]	Li M, Chen D, Jung D S, Shi X 2019 2019 China Semiconductor Technology International Conference Shanghai, China, March 17–18, 2019, pp1–3
[9]	Baliga B J 2023 Springer Handbook of Semiconductor Devices (Cham: Springer Nature) pp491–523
[10]	Baliga B J 2019 Fundamentals of Power Semiconductor Devices (Cham: Springer International Publishing
[11]	Appels J A, Vaes H M J 1979 1979 International Electron Devices Meeting December, 1979, pp238–241
[12]	Hossain Z 2008 2008 20th International Symposium on Power Semiconductor Devices and IC’s Orlando, FL, USA, May 18–22, 2008 pp133–136
[13]	Xiarong H, Bo Z, Xiaorong L, Guoliang Y, Xi C, Zhaoji L 2011 J. Semicond. 32 074006 Google Scholar
[14]	Hardikar S, Tadikonda R, Green D W, Vershinin K V, Narayanan E M S 2004 IEEE T. Electron. Dev. 51 2223 Google Scholar
[15]	Stengl R, Gosele U 1985 1985 International Electron Devices Washington, DC, USA, December 1–4, 1985 pp154–157
[16]	Duan B, Xing L, Wang Y, Yang Y 2022 IEEE T. Electron. Dev. 69 658 Google Scholar
[17]	Chen Y, Hu S, Cheng K, Jiang Y, Luo J, Wang J, Tang F, Zhou X, Zhou J, Gan P 2016 Micro. Nanostructures 89 59
[18]	Fujihira T 1997 Jpn. J. Appl. Phys. 36 6254 Google Scholar
[19]	Chen X B 2000 Chin. J. Electron. 9 6
[20]	Baliga B J, Syau T, Venkatraman P 1992 IEEE Electron Device Lett. 13 427 Google Scholar
[21]	Wang Y D, Duan B X, Song H T, Yang Y T 2021 IEEE T. Electron. Dev. 68 2414 Google Scholar
[22]	Inc. Synopsys 2016 Sentaurus^TM Device User Guide Verison L-2016.03
[23]	Chen W Z, Qin H F, Zhang H S, Han Z S 2022 IEEE T. Electron. Dev. 69 1900 Google Scholar
[24]	Zhou K, Luo X R, Li Z J, Zhang B 2015 IEEE T. Electron. Dev. 62 3334 Google Scholar
[25]	Cao Z, Sun Q, Zhang H W, Wang Q, Ma C F, Jiao L C 2022 Micromachines 13 843 Google Scholar
[26]	Cheng J, Zhang B, Li Z 2008 IEEE Electron Device Lett. 29 645 Google Scholar
[27]	Chen Y M, Lee C L, Tsai M H, Lee C T, Wang C C 2018 2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs Chicago, IL, USA, May 13–17, 2018 pp331–334
[28]	Zhang S, Tuan H C, Wu X J, Shi L, Wu J 2016 Microelectron. Reliab. 61 125 Google Scholar
[29]	Chen W, Pjencak J, Agam M, Janssens J, Jerome R, Menon S, Griswold M 2021 2021 33rd International Symposium on Power Semiconductor Devices and ICs Nagoya, Japan, May 30–June 03, 2021 pp287–290
[30]	Qiao M, Liu W, Yuan L, Xu P, Ma C, Lin F, Liu K, Guo Y, Lin Z, Zhang S, Zhang B 2022 2022 IEEE 34th International Symposium on Power Semiconductor Devices and ICs Vancouver, BC, Canada, May 22–25, 2022 pp149–152
[31]	Kong M, Yi B, Chen X 2019 2019 IEEE 13th International Conference on Power Electronics and Drive Systems Toulouse, France, July 09–12, 2019 pp1–4
[32]	Fan J, Wang Z G, Zhang B, Luo X R 2013 Chin. Phys. B 22 048501 Google Scholar
[33]	Honarkhah S, Nassif-Khalil S, Salama C A T 2004 Proceedings of the 30th European Solid-State Circuits Conference Leuven, Belgium, September 23, 2004 pp117–120
[34]	Hölke A, Antoniou M, Udrea F 2020 2020 32nd International Symposium on Power Semiconductor Devices and ICs Vienna, Austria, September 13–18, 2020 pp435–438

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