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In this work, the linear current degradation mechanism of 300 V silicon-on-insulator laterally double-diffused metal-oxide-semiconductor field effect transistor under total ionizing effect is studied, and a method in radiation-hardness for linear current by introducing an ultra-thin shielding layer is proposed. This new structure is realized with P-type ultra-thin shielding layer implantation under field oxide, in order to prevent the P-type layer from complete surface inversion, thereby truncating the surface current route and mitigating the current degradation effectively. For a laterally double-diffused metal-oxide-semiconductor field effect transistor, linear current degradation can be attributed mainly to holes introduced in the field oxide. In this work, the influence of introduced holes on electrical properties in the transistor oxides under harsh environment is simulated based on device and process simulation software, with optimized layer length, implantation energy, lateral distance and dose window, and the goal of linear current hardness (linear current increment decreasing from 447% in conventional structure to less than 10% in proposed structure) is achieved while maintaining pre-rad and post-rad breakdown voltages above 300 V under total dose of 0–500 krad(Si).
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Keywords:
- total ionizing dose effect /
- laterally double-diffused metal-oxide-semiconductor field effect transistor /
- ultra-thin shielding layer /
- linear current hardness /
- silicon-on-insulator
[1] Winokur P S, Lum G K, Shaneyfelt M R, Sexton F W, Hash G L, Scott L 1999 IEEE Trans. Nucl. Sci. 46 1494
Google Scholar
[2] Barth J L, Dyer C S, Stassinopoulos E G 2003 IEEE Trans. Nucl. Sci. 50 466
Google Scholar
[3] Pease R L 1996 IEEE Trans. Nucl. Sci. 43 442
Google Scholar
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Google Scholar
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Google Scholar
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Google Scholar
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Fan X, Li W, Li P, Zhang B, Xie X D, Wang G, Hu B, Zhai Y H 2012 Acta Phys. Sin. 61 016106
Google Scholar
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Google Scholar
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Google Scholar
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Google Scholar
Liu Z L, Hu Z Y, Zhang Z X, Shao H, Ning B X, Bi D W, Chen M, Zou S C 2011 Acta Phys. Sin. 60 116103
Google Scholar
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Google Scholar
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Google Scholar
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Google Scholar
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Google Scholar
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Google Scholar
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Google Scholar
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Google Scholar
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Google Scholar
[26] Huang Y S, Baliga B J 1991 3rd International Symposium on Power Semiconductor Devices and ICs, Baltimore, USA April 22-24, 1991 27
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图 1 (a) 300 V SOI LDMOS传统结构及线性电流退化机理; (b)本文提出的300 V SOI LDMOS加固结构及线性电流加固机理
Figure 1. (a) Conventional structure of 300 V SOI LDMOS and mechanism of linear current degradation under TID effect; (b) proposed rad-hard structure of 300 V SOI LDMOS and linear current hardness mechanism.
图 2 传统结构中, (a) DPTOP对辐照前后VB, Idlin的影响; (b) DPTOP =
$ 5\times {10}^{11} $ cm–2, 辐照前后线性电流密度分布, 其中横坐标表示距PTOP表面的纵向距离Figure 2. In the conventional structure, (a) impact of DPTOP on pre-rad and post-rad VB and Idlin; (b) distribution of pre-rad and post-rad linear current density when DPTOP =
$ 5\times {10}^{11} $ cm–2, wherein X axis represents vertical distance to PTOP surface.
图 3 不同注入能量下PSL掺杂浓度NPSL分布, 横坐标表示距PTOP表面的纵向距离
Figure 3. Distribution of PSL doping concentration NPSL under various implantation energy EPSL, wherein X axis represents vertical distance to PTOP surface.
图 4 d = 8
$ \mathrm{\mu }\mathrm{m} $ , LPSL = 3$ \mathrm{\mu }\mathrm{m} $ , DPTOP =$ 5\times {10}^{11} $ cm–2条件下, DPSL在不同注入能量下对辐照前后VB、Idlin的影响 (a) EPSL = 170 keV; (b) EPSL = 200 keV; (c) EPSL = 230 keVFigure 4. d = 8
$ \mathrm{\mu }\mathrm{m} $ , LPSL = 3$ \mathrm{\mu }\mathrm{m} $ , DPTOP =$ 5\times {10}^{11} $ cm–2, impact of DPSL on pre-rad and post-rad VB and Idlin for (a) EPSL = 170 keV; (b) EPSL = 200 keV; (c) EPSL = 230 keV.
图 5 d = 8
$ \mathrm{\mu }\mathrm{m} $ , LPSL = 3$ \mathrm{\mu }\mathrm{m} $ , EPSL = 190 keV, 不同DPSL对辐照前后VB, Idlin的影响: (a) DPTOP =$ 5\times {10}^{11} $ cm–2; (b) DPTOP =$ 6\times {10}^{11} $ cm–2; (c) DPTOP =$ 7\times {10}^{11} $ cm–2; (d) DPTOP =$ 8\times {10}^{11} $ cm–2Figure 5. Impact of DPSL on pre-rad and post-rad VB and Idlin for (a) DPTOP =
$ 5\times {10}^{11} $ cm–2; (b) DPTOP =$ 6\times {10}^{11} $ cm–2; (c) DPTOP =$ 7\times {10}^{11} $ cm–2; (d) DPTOP =$ 8\times {10}^{11} $ cm–2 when d = 8$ \mathrm{\mu }\mathrm{m} $ , LPSL = 3$ \mathrm{\mu }\mathrm{m} $ , EPSL = 190 keV.
图 6 d = 8
$ \mathrm{\mu }\mathrm{m} $ , LPSL = 3$ \mathrm{\mu }\mathrm{m} $ , EPSL = 190 keV, DPTOP =$ 7\times {10}^{11} $ cm–2, 不同DPSL对应的漂移区硅表面电场分布 (a) 辐照前; (b) 辐照后. 图(a)中内插图标明坐标原点O与X方向Figure 6. Silicon surface electric field distribution in drift region under various DPSL for (a) pre-rad and (b) post-rad conditions when d = 8
$ \mathrm{\mu }\mathrm{m} $ , LPSL = 3$ \mathrm{\mu }\mathrm{m} $ , EPSL = 190 keV, DPTOP =$ 7\times {10}^{11} $ cm–2. Inset indicates origin of the coordinate and X direction
图 7 LPSL = 3
$ \mathrm{\mu }\mathrm{m} $ , EPSL = 190 keV, d对辐照前后VB和Idlin的影响: (a) DPTOP =$ 5\times {10}^{11} $ cm–2, DPSL =$ 1\times {10}^{13} $ cm–2; (b) DPTOP =$ 6\times {10}^{11} $ cm–2, DPSL =$ 1\times {10}^{13} $ cm–2Figure 7. Impact of d on pre-rad and post-rad VB and Idlin when LPSL = 3
$ \mathrm{\mu }\mathrm{m} $ , EPSL = 190 keV for (a) DPTOP =$ 5\times {10}^{11} $ cm–2, DPSL =$ 1\times {10}^{13} $ cm–2; (b) DPTOP =$ 6\times {10}^{11} $ cm–2, DPSL =$ 1\times {10}^{13} $ cm–2.
图 8 DPTOP =
$ 5\times {10}^{11} $ cm–2, DPSL =$ 1\times {10}^{13} $ cm–2, EPSL = 190 keV, LPSL = 3$ \mathrm{\mu }\mathrm{m} $ , (a)不同d值下, 器件的辐照前与辐照后转移特性曲线; (b) d = 2, 4, 6, 8$ \mathrm{\mu }\mathrm{m} $ , 辐照后线性电流密度分布, 其中横坐标表示距PTOP表面的纵向距离Figure 8. DPTOP =
$ 5\times {10}^{11} $ cm–2, DPSL =$ 1\times {10}^{13} $ cm–2, EPSL = 190 keV, LPSL = 3$ \mathrm{\mu }\mathrm{m} $ , (a) Pre-rad and post-rad transfer curves under various d; (b) distribution of post-rad linear current density when d = 2, 4, 6, 8$ \mathrm{\mu }\mathrm{m} $ , wherein X axis represents vertical distance to PTOP surface.
图 9 DPTOP =
$ 5\times {10}^{11} $ cm–2, d = 8$ \mathrm{\mu }\mathrm{m} $ , EPSL = 190 keV, 不同LPSL对辐照前后VB, Idlin的影响: (a) DPSL =$ 8\times {10}^{12} $ cm–2; (b) DPSL =$ 9\times {10}^{12} $ cm–2; (c) DPSL =$ 1\times {10}^{13} $ cm–2; (d) DPSL =$ 1.1\times {10}^{13} $ cm–2Figure 9. Impact of LPSL on pre-rad and post-rad VB and Idlin for (a) DPSL =
$ 8\times {10}^{12} $ cm–2; (b) DPSL =$ 9\times {10}^{12} $ cm–2; (c) DPSL =$ 1\times {10}^{13} $ cm–2; (d) DPSL =$ 1.1\times {10}^{13} $ cm–2 when DPTOP=$ 5\times {10}^{11} $ cm–2, d = 8$ \mathrm{\mu }\mathrm{m} $ , EPSL = 190 keV. -
[1] Winokur P S, Lum G K, Shaneyfelt M R, Sexton F W, Hash G L, Scott L 1999 IEEE Trans. Nucl. Sci. 46 1494
Google Scholar
[2] Barth J L, Dyer C S, Stassinopoulos E G 2003 IEEE Trans. Nucl. Sci. 50 466
Google Scholar
[3] Pease R L 1996 IEEE Trans. Nucl. Sci. 43 442
Google Scholar
[4] Oldham T R, Mclean B 2003 IEEE Trans. Nucl. Sci. 50 483
Google Scholar
[5] Barnaby H J 2006 IEEE Trans. Nucl. Sci. 53 3103
Google Scholar
[6] Normand E 1996 IEEE Trans. Nucl. Sci. 43 461
Google Scholar
[7] Titus J L 2013 IEEE Trans. Nucl. Sci. 60 1912
Google Scholar
[8] Srour J R, Palko J W 2013 IEEE Trans. Nucl. Sci. 60 1740
Google Scholar
[9] Jiang J Z, Shu W, Chong K S, Lin T, Zwa Lwin N K, Chang J S, Liu J Y 2016 IEEE International Symposium on Circuits and Systems Montreal, Canada May 22–25, 2016 p5
[10] Xie X D, Yang Z Z, Deng M X, Chen K B, Li W 2019 IEEE Trans. Device Mater. Reliab. 19 242
Google Scholar
[11] 范雪, 李威, 李平, 张斌, 谢小东, 王刚, 胡滨, 翟亚红 2012 物理学报 61 016106
Google Scholar
Fan X, Li W, Li P, Zhang B, Xie X D, Wang G, Hu B, Zhai Y H 2012 Acta Phys. Sin. 61 016106
Google Scholar
[12] Dodd P E, Shaneyfelt M R, Schwank J R, Felix J A 2010 IEEE Trans. Nucl. Sci. 57 1747
Google Scholar
[13] Hughes H L, Benedetto J M 2003 IEEE Trans. Nucl. Sci. 50 500
Google Scholar
[14] 刘张李, 胡志远, 张正选, 邵华, 宁冰旭, 毕大炜, 陈明, 邹世昌 2011 物理学报 60 116103
Google Scholar
Liu Z L, Hu Z Y, Zhang Z X, Shao H, Ning B X, Bi D W, Chen M, Zou S C 2011 Acta Phys. Sin. 60 116103
Google Scholar
[15] Wu M, Zhang C C, Peng W, Xu J, Jin H, Zeng Y, Chen Z J 2020 IEEE Trans. Nucl. Sci. 67 708
Google Scholar
[16] Sorge R, Schmidt J, Reimer F, Wipf C, Korndoerfer F, Pliquett R, Barth R 2019 Nucl. Instr. and Meth. in Phys. Res. 924 166
Google Scholar
[17] Ali K B, Gammon P M, Chan C W, Li F, Pathirana V, Trajkovic T, Gity F, Flandre D, Kilchytska V 2017 47 th European Solid State Device Research Conference Leuven, Belgium, September 11–14, 2017 p236
[18] Liu M X, Han Z S, Bi J S, Fan X M, Liu G, Du H 2009 J. Semicond. 30 014004
Google Scholar
[19] Qiao F Y, Pan L Y, Wu D, Liu L F, Xu J 2014 J. Semicond. 35 024003
Google Scholar
[20] Liu M X, Han Z S, Bi J S, Fan X M, Liu G, Du H, Song L M 2008 J. Semicond. 29 2158
[21] Li Y F, Zhu S L, Wu J W, Hong G S, Xu Z 2019 J. Semicond. 40 052401
Google Scholar
[22] Asano M, Sekigawa D, Hara K, Aoyagi W, Honda S, Tobita N, Arai Y, Miyoshi T, Kurachi I, Tsuboyama T, Yamada M 2016 Nucl. Instr. and Meth. in Phys. Res. 831 315
Google Scholar
[23] Schwank J R, Ferlet- Cavrois V, Shaneyfelt M R, Paillet P, Dodd P E 2003 IEEE Trans. Nucl. Sci. 50 522
Google Scholar
[24] Huang Y, Li B H, Zhao X, Zheng Z S, Gao J T, Zhang G, Li B, Zhang G H, Tang K, Han Z S, Luo J J 2018 IEEE Trans. Nucl. Sci. 65 1532
Google Scholar
[25] Yuan Z Y A, Qiao M, Li X J, Hou D C, Zhang S H, Zhou X, Li Z J, Zhang B 2021 IEEE Trans. Electron Devices 68 2064
Google Scholar
[26] Huang Y S, Baliga B J 1991 3rd International Symposium on Power Semiconductor Devices and ICs, Baltimore, USA April 22-24, 1991 27
[27] Imam M, Hossain Z, Quddus M, Adams J, Hoggatt C, Ishiguro T, Nair R 2003 IEEE Trans. Electron Devices 50 1697
Google Scholar
[28] Ludikhuize A W 2000 12 th International Symposium on Power Semiconductor Devices and ICs, Toulouse, France May 22–25, 2000 11
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